On 11/03/2015 08:40 AM, Jeff Moyer wrote:
Hi,
Zhangqing Luo reported long boot times on a system with thousands of
LUNs when scsi-mq was enabled. He narrowed the problem down to
blk_mq_add_queue_tag_set, where every queue is frozen in order to set
the BLK_MQ_F_TAG_SHARED flag. Each added devic
Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
tags/media/v4.4-1
For the media updates, including:
- Lots of improvements at the kABI documentation;
- Split of Videobuf2 into a common part and a V4L2 specific one;
- Split of the VB2 tracing events in
The trailing everyone@ allow ace can grant permissions to all file
classes including the owner and group class. Before we can apply the
other mask to this entry to turn it into an "other class" entry, we need
to ensure that members of the owner or group class will not lose any
permissions from tha
On Mon, Nov 02, 2015 at 05:49:46PM -0800, Dmitry Torokhov wrote:
> On Fri, Oct 30, 2015 at 07:41:23PM -0500, Michael Welling wrote:
> > This patch separates the SPI functionality from core functionality
> > that overlaps with the tsc2004.
> >
> > Prepares kernel for new tsc2004 driver without much
From: "Aneesh Kumar K.V"
Support the richacl permission model in ext4. The richacls are stored
in "system.richacl" xattrs. Richacls need to be enabled by tune2fs or
at file system create time.
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Andreas Gruenbacher
---
fs/ext4/Kconfig | 11 +++
Error codes from xfs_attr_get other than -ENOATTR were not properly
reported. Fix that.
In addition, the declaration of struct xfs_inode in xfs_acl.h isn't needed.
Signed-off-by: Andreas Gruenbacher
---
fs/xfs/xfs_acl.c | 1 +
fs/xfs/xfs_acl.h | 1 -
2 files changed, 1 insertion(+), 1 deletion
On 11/3/2015 2:44 AM, Dan Williams wrote:
On Mon, Nov 2, 2015 at 10:30 PM, Vinod Koul wrote:
On Mon, Nov 02, 2015 at 11:18:37PM -0500, Sinan Kaya wrote:
On 11/2/2015 11:15 PM, Vinod Koul wrote:
On Mon, Nov 02, 2015 at 01:07:38AM -0500, Sinan Kaya wrote:
This patch adds supporting utility
Instead of adding the synthesized POSIX ACL attribute names after listing all
non-synthesized attributes, generate them immediately when listing the
non-synthesized attributes.
In addition, merge xfs_xattr_put_listent and xfs_xattr_put_listent_sizes to
ensure that the list size is computed correct
From: "Aneesh Kumar K.V"
This feature flag selects richacl instead of posix acl support on the
file system. In addition, the "acl" mount option is needed for enabling
either of the two kinds of acls.
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Andreas Gruenbacher
---
fs/ext4/ext4.h | 6 +
From: Michal Kubecek
Date: Tue, 3 Nov 2015 08:51:07 +0100 (CET)
> Both tunnel6_protocol and tunnel46_protocol share the same error
> handler, tunnel6_err(), which traverses through tunnel6_handlers list.
> For ipip6 tunnels, we need to traverse tunnel46_handlers as we do e.g.
> in tunnel46_rcv()
Hi Arnd,
2015-11-03 14:43 GMT+01:00 Arnd Bergmann :
> A recent bug fix added a call to forget_cached_acl(), but that
> function is not always available, so we can get a build error
> here [...]
didn't expect anybody to trip over this anytime soon...
I've sent a fix yesterday,
http://oss.sgi.c
Automatic Inheritance (AI) allows changes to the acl of a directory to
propagate down to children.
This is mostly implemented in user space: when a process changes the
permissions of a directory and Automatic Inheritance is enabled for that
directory, the process must propagate those changes to al
Make xfs_set_mode non-static and move it from xfs_acl.c into xfs_inode.c.
Signed-off-by: Andreas Gruenbacher
---
fs/xfs/xfs_acl.c | 18 --
fs/xfs/xfs_inode.c | 24
fs/xfs/xfs_inode.h | 2 ++
3 files changed, 26 insertions(+), 18 deletions(-)
diff --gi
When a new file is created, it can inherit an acl from its parent
directory; this is similar to how default acls work in POSIX (draft)
ACLs.
As with POSIX ACLs, if a file inherits an acl from its parent directory,
the intersection between the create mode and the permissions granted by
the inherite
ACLs are considered equivalent to file modes if they only consist of
owner@, group@, and everyone@ entries, the owner@ permissions do not
depend on whether the owner is a member in the owning group, and no
inheritance flags are set. This test is used to avoid storing richacls
if the acl can be com
Add richacl xattr handler implementing the xattr operations based on the
get_richacl and set_richacl inode operations.
Signed-off-by: Andreas Gruenbacher
---
fs/richacl_xattr.c| 78 +++
include/linux/richacl_xattr.h | 2 ++
2 files changed, 80
Doing a chmod() sets the file mode, which includes the file permission
bits. When a file has a richacl, the permissions that the richacl
grants need to be limited to what the new file permission bits allow.
This is done by setting the file masks in the richacl to what the file
permission bits map
On Tue, Nov 03, 2015 at 04:33:29PM +0900, Minchan Kim wrote:
> On Tue, Nov 03, 2015 at 09:16:50AM +0200, Kirill A. Shutemov wrote:
> > On Tue, Nov 03, 2015 at 12:02:58PM +0900, Minchan Kim wrote:
> > > Hello Kirill,
> > >
> > > On Mon, Nov 02, 2015 at 02:57:49PM +0200, Kirill A. Shutemov wrote:
>
On 10/31/2015 09:37 PM, Mark Brown wrote:
On Fri, Oct 30, 2015 at 05:41:43PM -0500, Andrew F. Davis wrote:
+struct tps65086_regulator {
+ struct regulator_desc desc;
+ unsigned int decay_reg;
+ unsigned int decay_mask;
The decay_reg and decay_mask fields appear to be entirel
This "Sonics Silicon Backplane" support is not needed on Atmel SoCs: remove it.
Signed-off-by: Nicolas Ferre
---
Arnd,
Here is the patch that fixes what you highlighted in your patch "[PATCH] ssb:
mark ssb_bus_register as __maybe_unused". Indeed, there is no reason for
enabling this option.
Tha
On 11/03/2015 10:15 PM, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
- unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops pci_root_ops = {
+ .map_bus = pci_mc
Hi Laurent,
[auto build test WARNING on scsi/for-next]
[also WARNING on: v4.3 next-20151103]
url:
https://github.com/0day-ci/linux/commits/Laurent-Vivier/ibmvscsi-make-parameters-max_id-and-max_channel-read-only/20151103-223706
base: https://github.com/0day-ci/linux
Laurent-Vivier
>From: Vineet Gupta [mailto:vineet.gup...@synopsys.com]
>Sent: Monday, November 02, 2015 12:57 PM
>When trying to build with 2015.06 BE tools,
>../arch/arc/plat-eznps/entry.S: Assembler messages:
>../arch/arc/plat-eznps/entry.S:51: Error: bad instruction `sr
>(1<<28),[(0xF800+0x024)]'
>mak
Map between "system.richacl" xattrs and the in-kernel representation.
Signed-off-by: Andreas Gruenbacher
---
fs/Makefile| 2 +-
fs/richacl_xattr.c | 220 +
fs/xattr.c | 34 +-
include/linux
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
>
> I don't see anywhere in the SBSA spec addendum that the PCI
> configuration space section that unaligned accesses *MUST* be supported.
>
> If this is required, please have this info added to the spec. I can work
> with the designers for
From: Andrew Lunn
Frames with DSA headers passing to/from the CPU were taking place in the
MAC learning on these ports, resulting in incorrect ATU entries. Disable
learning on these ports.
Signed-off-by: Andrew Lunn
Signed-off-by: Vivien Didelot
---
drivers/net/dsa/mv88e6xxx.c | 8 ++--
d
DSA ports must be members of a VLAN in order to ensure frame bridging
between chained switch chips.
Thus tag them in addition to the CPU port when adding a VLAN, and skip
them when deleting a VLAN and reporting VLAN members.
Also use the UNMODIFIED egress policy, so that frames egress on these
po
Cache richacls in struct inode so that this doesn't have to be done
individually in each filesystem. This is similar to POSIX ACLs.
Signed-off-by: Andreas Gruenbacher
---
fs/inode.c | 11 ++--
fs/posix_acl.c | 2 +-
fs/richacl_base.c | 4 +--
fs/richacl_inode.c
On Mon, Nov 02, 2015 at 11:44:23PM -0800, Dan Williams wrote:
> Originally ioatdma and iop-adma had local self tests before Haavard
> created dmatest. I agree having the drivers also do a test each boot
> is redundant, but then again dmatest is not automatic and I saw the
> local self test catch a
A richacl roughly grants a requested access if the NFSv4 acl in the
richacl grants the requested permissions according to the NFSv4
permission check algorithm and the file mask that applies to the process
includes the requested permissions.
Signed-off-by: Andreas Gruenbacher
Reviewed-by: "J. Bruc
On Tue, Nov 03, 2015 at 10:22:25AM +0200, Andy Shevchenko wrote:
> On Tue, Nov 3, 2015 at 9:44 AM, Dan Williams wrote:
> > On Mon, Nov 2, 2015 at 10:30 PM, Vinod Koul wrote:
> >> On Mon, Nov 02, 2015 at 11:18:37PM -0500, Sinan Kaya wrote:
> >>> On 11/2/2015 11:15 PM, Vinod Koul wrote:
> >>> >On M
On Tue, Nov 3, 2015 at 2:02 AM, Arnd Bergmann wrote:
> I suspect this will come up again in the future. The problem is
> really that drivers/clocksource has different rules from almost
> everything else, by requiring the platform to 'select' the driver.
>
> The second version that Krzysztof posted
Compute upper bound owner, group, and other file masks with as few
permissions as possible without denying any permissions that the NFSv4
acl in a richacl grants.
This algorithm is used when a file inherits an acl at create time and
when an acl is set via a mechanism that does not provide file mas
On Tue, Nov 03, 2015 at 08:31:57AM -0600, Timur Tabi wrote:
> Sinan Kaya wrote:
> >
> >Almost all DMA engine drivers come with some sort of selftest code
> >called from probe. I followed the same design pattern.
>
> As others have said, it appears that's outdated.
>
> Is there a real possibility
On Tue, 3 Nov 2015, Josh Poimboeuf wrote:
> On Tue, Nov 03, 2015 at 11:52:08AM +0100, Miroslav Benes wrote:
> > On Mon, 2 Nov 2015, Chris J Arges wrote:
> >
> > [...]
> >
> > > +static int klp_get_func_pos_callback(void *data, const char *name,
> > > + struct module
From: Vineet Gupta [mailto:vineet.gup...@synopsys.com]
Sent: Monday, November 02, 2015 1:04 PM
>> +
>> +upper = ioread32be(upper_p);
>Consider using the _relaxed macros even if your platform doesn't have specific
>IO barriers.
[Noam Camus] What is the big endian flavor for _relaxed macros.
Nikolay Aleksandrov wrote:
On 11/03/2015 02:57 PM, Jarod Wilson wrote:
Geert Uytterhoeven wrote:
On Tue, Nov 3, 2015 at 11:03 AM, Nikolay Aleksandrov
wrote:
On 11/03/2015 03:55 AM, Jarod Wilson wrote:
[snip]
+#define for_each_netdev_feature(mask_addr, feature) \
+
On Tue, Oct 27, 2015 at 05:38:41PM +0100, Tomasz Nowicki wrote:
> Architectures which support PCI_DOMAINS_GENERIC (like ARM64)
> cannot call pci_bus_assign_domain_nr along ACPI PCI host bridge
> initialization since this function needs valid parent device reference
> to be able to retrieve domain n
Normally, deleting a file requires MAY_WRITE access to the parent
directory. With richacls, a file may be deleted with MAY_DELETE_CHILD access
to the parent directory or with MAY_DELETE_SELF access to the file.
To support that, pass the MAY_DELETE_CHILD mask flag to inode_permission()
when checki
On Tue, Nov 03, 2015 at 10:39:11AM -0500, Mimi Zohar wrote:
> On Tue, 2015-11-03 at 09:39 +0200, Jarkko Sakkinen wrote:
> > On Mon, Nov 02, 2015 at 07:16:49AM -0500, Mimi Zohar wrote:
> > > On Fri, 2015-10-30 at 13:35 +0200, Jarkko Sakkinen wrote:
> > >
> > > > @@ -787,6 +791,20 @@ static int geto
Hi Changsheng,
According to the following thread, Tang has no objection to change kernel
behavior since udev cannot online memory as movable.
https://lkml.org/lkml/2015/10/21/159
So how about reposting the v5 patch?
I have a comment about the patch. Please see below.
On Tue, 15 Sep 2015 03:49:5
Hi Milo,
Thanks for the patch. Apart from the issues
pointed out by Rob, I have one more suggestion below.
On 11/02/2015 06:24 AM, Milo Kim wrote:
LM3633 LED device is one of TI LMU device list.
Cc: devicet...@vger.kernel.org
Cc: Jacek Anaszewski
Cc: Lee Jones
Cc: linux-kernel@vger.kernel.or
The lockup detector suspend/resume interface that was introduced by
commit 8c073d27d7ad293bf734cc8475689413afadab81 does not protect
itself against races with CPU hotplug. Hence, theoretically it is
possible that a new watchdog thread is started on a hotplugged CPU
while the lockup detector is susp
Hi Milo,
Thanks for the patch. Please find my comments in the code.
On 11/02/2015 06:24 AM, Milo Kim wrote:
LM3633 LED driver supports generic LED functions and pattern generation.
Pattern is generated through the sysfs. ABI documentation is also added.
Device creation from device tree
---
Sandy,
+ Ted Ts'o
On Mon, Oct 26, 2015 at 12:41:53PM -0400, Sandy Harris wrote:
> Signed-off-by: Sandy Harris
Acked-by: Jason Cooper
thx,
Jason.
context left for Ted:
> ---
> drivers/char/random.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/char/rando
On 03/11/15 15:23, Bharat Kumar Gogada wrote:
> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
>
> Signed-off-by: Bharat Kumar Gogada
> Signed-off-by: Ravi Kiran Gummaluri
> ---
> Removed msi_controller and added irq_domian for MSI domain hierarchy.
> Modified code for filling MSI a
Hi all,
I dusted off this series from Jan 2014. Patch #2 and #3 still need an ack.
This patch series introduces stolen ticks accounting for Xen on ARM and
ARM64. Stolen ticks are clocksource ticks that have been "stolen" from
the cpu, typically because Linux is running in a virtual machine and
ifdef CONFIG_PARAVIRT in sched/core.c is redundant, as asm/paravirt.h
is already protected by #ifdef CONFIG_PARAVIRT.
Add include asm/paravirt.h to cputime.c, as steal_account_process_tick
calls paravirt_steal_clock, which is defined in paravirt.h.
Signed-off-by: Stefano Stabellini
CC: mi...@red
On Mon 02-11-15 21:31:11, Dan Williams wrote:
> On Mon, Nov 2, 2015 at 8:48 PM, Dave Chinner wrote:
> > On Mon, Nov 02, 2015 at 07:27:26PM -0800, Dan Williams wrote:
> >> On Mon, Nov 2, 2015 at 4:51 PM, Dave Chinner wrote:
> >> > On Sun, Nov 01, 2015 at 11:29:53PM -0500, Dan Williams wrote:
> >>
Introduce CONFIG_PARAVIRT and PARAVIRT_TIME_ACCOUNTING on ARM64.
Necessary duplication of paravirt.h and paravirt.c with ARM.
The only paravirt interface supported is pv_time_ops.steal_clock, so no
runtime pvops patching needed.
This allows us to make use of steal_account_process_tick for stolen
Register the runstate_memory_area with the hypervisor.
Use pv_time_ops.steal_clock to account for stolen ticks.
Signed-off-by: Stefano Stabellini
---
Changes in v4:
- don't use paravirt_steal_rq_enabled: we do not support retrieving
stolen ticks for vcpus other than one we are running on.
Chan
Signed-off-by: Stefano Stabellini
Acked-by: Ian Campbell
Reviewed-by: Konrad Rzeszutek Wilk
CC: konrad.w...@oracle.com
---
Changes in v10:
- rebase
- remove ia64 changes
---
arch/x86/xen/time.c | 76 +
drivers/xen/Makefile |2 +-
drivers/xen/ti
On 29/10/15 01:57, Vinod Koul wrote:
> On Wed, Oct 28, 2015 at 01:32:12PM +, Jon Hunter wrote:
>>
>> On 28/10/15 07:03, Vinod Koul wrote:
>>> On Fri, Oct 16, 2015 at 09:25:52AM +0100, Jon Hunter wrote:
@@ -1182,14 +1182,11 @@ static int tegra_dma_alloc_chan_resources(struct
dma_chan
Introduce CONFIG_PARAVIRT and PARAVIRT_TIME_ACCOUNTING on ARM.
The only paravirt interface supported is pv_time_ops.steal_clock, so no
runtime pvops patching needed.
This allows us to make use of steal_account_process_tick for stolen
ticks accounting.
Signed-off-by: Stefano Stabellini
Acked-by:
If the dtb specifies dma-ranges, we use those values. Otherwise, we
default to the values that were previously hardcoded into the driver.
Signed-off-by: Phil Edworthy
---
.../devicetree/bindings/pci/pci-rcar-gen2.txt | 6 ++
drivers/pci/host/pci-rcar-gen2.c | 76 +
On Tue, Nov 3, 2015 at 10:17 AM, Andreas Gruenbacher
wrote:
> When encoding large, variable-length objects such as acls into xdr_bufs,
> it is easier to allocate buffer pages on demand rather than precomputing
> the required buffer size.
>
NACK. We're not doing allocations from inside the XDR enc
On 11/3/2015 3:25 AM, Quentin Casasnovas wrote:
On Fri, Oct 16, 2015 at 10:47:49AM -0700, santosh shilimkar wrote:
On 10/16/2015 8:11 AM, Quentin Casasnovas wrote:
Sasha's found a NULL pointer dereference in the RDS connection code when
sending a message to an apparently unbound socket. The pr
On 11/02/2015 04:41 PM, Vivien Didelot wrote:
> Hi Neil,
>
> Nice cleanup. I'll just be a bit picky here, so you may not consider my
> comment for this patchset, but maybe for the future ones. Unless I'm
> mistaken, there is no reason to group all these patches together.
>
> The first 4 patches a
On 11/3/2015 11:10 AM, Vinod Koul wrote:
On Tue, Nov 03, 2015 at 08:31:57AM -0600, Timur Tabi wrote:
Sinan Kaya wrote:
Almost all DMA engine drivers come with some sort of selftest code
called from probe. I followed the same design pattern.
As others have said, it appears that's outdated.
On Tue, Nov 03, 2015 at 02:32:14PM +, Lorenzo Pieralisi wrote:
> On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote:
> > On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
>
> [...]
>
> > > +static int __init pcibios_assign_resources(void)
> > > +{
> > > + if (ac
On Tue, 03 Nov 2015 16:05:51 +0100
Arnd Bergmann wrote:
> The SoC variant of the ssb code is now optional like the other
> ones, which means we can build the framwork without any
> front-end, but that results in a warning:
>
> drivers/ssb/main.c:616:12: warning: 'ssb_bus_register' defined but no
On Tue, Nov 3, 2015 at 10:17 AM, Andreas Gruenbacher
wrote:
> When decoding GETATTR replies, the client checks the attribute bitmap
> for which attributes the server has sent. It misses bits at the word
> boundaries, though; fix that.
>
> Signed-off-by: Andreas Gruenbacher
> ---
> fs/nfs/nfs4xd
On Tue, Nov 03, 2015 at 09:57:46AM -0600, Andrew F. Davis wrote:
> On 10/31/2015 09:37 PM, Mark Brown wrote:
> >On Fri, Oct 30, 2015 at 05:41:43PM -0500, Andrew F. Davis wrote:
> >>+ struct regulator_desc desc;
> >>+ unsigned int decay_reg;
> >>+ unsigned int decay_mask;
> >The decay_reg an
On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
I don't see anywhere in the SBSA spec addendum that the PCI
configuration space section that unaligned accesses *MUST* be supported.
If this is required, please have this info added to the spec
From: Arnd Bergmann
Date: Tue, 03 Nov 2015 14:51:29 +0100
> The newly added led trigger support in the com20020-pci driver causes
> build errors when CONFIG_LEDS_CLASS is disabled:
>
> drivers/built-in.o: In function `com20020pci_probe':
> (.text+0x185dc4): undefined reference to `devm_led_class
From: Vivien Didelot
Date: Tue, 3 Nov 2015 10:52:36 -0500
> From: Andrew Lunn
>
> Frames with DSA headers passing to/from the CPU were taking place in the
> MAC learning on these ports, resulting in incorrect ATU entries. Disable
> learning on these ports.
>
> Signed-off-by: Andrew Lunn
> Si
From: Vivien Didelot
Date: Tue, 3 Nov 2015 10:52:52 -0500
> DSA ports must be members of a VLAN in order to ensure frame bridging
> between chained switch chips.
>
> Thus tag them in addition to the CPU port when adding a VLAN, and skip
> them when deleting a VLAN and reporting VLAN members.
>
From: Jarod Wilson
Date: Tue, 3 Nov 2015 10:15:59 -0500
> As pointed out by Nikolay and further explained by Geert, the initial
> for_each_netdev_feature macro was broken, as feature would get set outside
> of the block of code it was intended to run in, thus only ever working for
> the first fe
On Fri, 30 Oct 2015, Rob Herring wrote:
> On Thu, Oct 29, 2015 at 11:02 AM, atull wrote:
> > On Wed, 28 Oct 2015, Rob Herring wrote:
> >
> >> On Tue, Oct 27, 2015 at 5:09 PM, wrote:
> >> > From: Alan Tull
> >> >
> >> > New bindings document for simple fpga bus.
> >> >
> >> > Signed-off-by: Ala
On Wed, 28 Oct, at 09:12:27AM, Saurabh Sengar wrote:
> replace GFP_KERNEL with GFP_ATOMIC, as code while holding a spinlock
> should be atomic
> GFP_KERNEL may sleep and can cause deadlock, where as GFP_ATOMIC may
> fail but certainly avoids deadlock
>
> Signed-off-by: Saurabh Sengar
> ---
> dri
On Mon 02-11-15 09:58:01, Jens Axboe wrote:
> On 11/02/2015 05:20 AM, Jan Kara wrote:
> >Hello,
> >
> >when looking into a performance issue, I've noticed one interesting thing
> >in blktrace data:
> >
> > 8,020 1.745149746 0 m N cfq320SN / dispatch_insert
> > 8,02
The commit 96d0df79f264 ("proc: make proc_fd_permission() thread-friendly")
fixed the access to /proc/self/fd from sub-threads, but introduced another
problem: a sub-thread can't access /proc//fd/ or /proc/thread-self/fd
if generic_permission() fails.
Change proc_fd_permission() to check same_thre
On Tue, 3 Nov 2015 14:31:20 +0100
Peter Zijlstra wrote:
> > @@ -5136,6 +5148,16 @@ pick_next_task_fair(struct rq *rq, struct
> > task_struct *prev) struct task_struct *p;
> > int new_tasks;
> >
> > +#ifdef CONFIG_CFS_IDLE_INJECT
> > + if (cfs_rq->force_throttled &&
> > + !idle_c
On Tuesday 03 November 2015 17:27:21 Michael Büsch wrote:
> On Tue, 03 Nov 2015 16:05:51 +0100
> Arnd Bergmann wrote:
>
> > The SoC variant of the ssb code is now optional like the other
> > ones, which means we can build the framwork without any
> > front-end, but that results in a warning:
> >
Sinan Kaya wrote:
1. Bug in ARM64 DMA subsystem.
2. Bug in IOMMU driver.
3. Bug in another newly introduced driver. The new driver would hog the
CPU and won't allow HIDMA interrupts to execute. Therefore, the test
times out.
Which driver?
Wouldn't these problems already be exposed by dmatest?
Vinod Koul wrote:
Failing politely would be right thing to do. If DMA starts sending data to
anywhere in system memory due to bug or wrong addresses we can't do
anything to prevent that
My point is that I have a hard time believing that a DMA failure would
likely result the driver politely det
On 11/03/2015 04:25 PM, Jens Axboe wrote:
> On 11/03/2015 06:53 AM, Arnd Bergmann wrote:
>> The newly added lightnvm incorrectly uses a sector_t variable to
>> represent a data structure with fixed length bit fields, which breaks
>> when sector_t is configured to be 32-bit:
>>
>> In file included f
On 11/03/2015 09:41 AM, Jan Kara wrote:
On Mon 02-11-15 09:58:01, Jens Axboe wrote:
On 11/02/2015 05:20 AM, Jan Kara wrote:
Hello,
when looking into a performance issue, I've noticed one interesting thing
in blktrace data:
8,020 1.745149746 0 m N cfq320SN / dispatch_
On Tue, Nov 03, 2015 at 05:09:48PM +0100, Miroslav Benes wrote:
> On Tue, 3 Nov 2015, Josh Poimboeuf wrote:
>
> > On Tue, Nov 03, 2015 at 11:52:08AM +0100, Miroslav Benes wrote:
> > > On Mon, 2 Nov 2015, Chris J Arges wrote:
> > >
> > > [...]
> > >
> > > > +static int klp_get_func_pos_callback(v
From: Amitoj Kaur Chawla
Date: Thu, 22 Oct 2015 18:15:50 +0530
> This driver uses 'struct timeval' which we are trying to remove since
> 32 bit time types will break in the year 2038 by replacing it with
> ktime_t.
>
> This patch changes do_gettimeofday() to ktime_get() because
> ktime_get() ret
On Tue, 03 Nov 2015 17:42:26 +0100
Arnd Bergmann wrote:
> On Tuesday 03 November 2015 17:27:21 Michael Büsch wrote:
> > On Tue, 03 Nov 2015 16:05:51 +0100
> > Arnd Bergmann wrote:
> >
> > > The SoC variant of the ssb code is now optional like the other
> > > ones, which means we can build the
On 11/02/2015 03:34 PM, Matias Bjorling wrote:
On 11/02/2015 04:37 PM, Jens Axboe wrote:
On 11/02/2015 05:43 AM, Matias Bjorling wrote:
On 11/02/2015 02:16 AM, Randy Dunlap wrote:
On 11/01/15 08:53, Stephen Rothwell wrote:
Hi all,
I start again a day early, and this is how you all repay me?
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
> menu "Kernel Features"
> diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
> index b3d098b..66cc1ae 100644
> --- a/arch/arm64/kernel/pci.c
> +++ b/arch/arm64/kernel/pci.c
> @@ -11,12 +11,15 @@
> */
>
> #inc
On Tuesday 03 November 2015 11:33:18 Sinan Kaya wrote:
>
> On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
> > On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
> >>
> >> I don't see anywhere in the SBSA spec addendum that the PCI
> >> configuration space section that unaligned accesses *MUST* be
On 11/3/2015 11:46 AM, Timur Tabi wrote:
Sinan Kaya wrote:
1. Bug in ARM64 DMA subsystem.
2. Bug in IOMMU driver.
3. Bug in another newly introduced driver. The new driver would hog the
CPU and won't allow HIDMA interrupts to execute. Therefore, the test
times out.
Which driver?
Some other
On Tue, 2015-11-03 at 14:13 +0100, Vitaly Kuznetsov wrote:
> James Bottomley writes:
>
> > On Mon, 2015-11-02 at 16:58 +0100, Vitaly Kuznetsov wrote:
> >> James Bottomley writes:
> >>
> >> > On Fri, 2015-10-30 at 11:46 +0100, Vitaly Kuznetsov wrote:
> >> >> James Bottomley writes:
> >> >>
> >
On 02/11/15 14:34, Linus Walleij wrote:
> Instead of having the irqchip being a static struct, make it part
> of the per-instance data so we can assign it a dynamic name. This
> has the usable side effect of displaying the GIC with an instance
> number as GIC0, GIC1 ... GICn in /proc/interrupts, wh
On 11/02, Peter Zijlstra wrote:
>
> +#define smp_cond_acquire(cond) do {\
> + while (!(cond)) \
> + cpu_relax();\
> + smp_read_barrier_depends(); /* ctrl */ \
> + smp_rmb(); /* ctrl + rmb := acquire */ \
> +} wh
Rui, Rafael,
On Tue, Nov 03, 2015 at 03:10:28AM +, Zhang, Rui wrote:
>
> > Javi Merino (2):
> > PM / OPP: get the voltage for all OPPs
>
> I think this patch should be took by Rafael, right?
>
> Thanks,
> Rui
>
> > drivers/base/power/opp.c | 4 +-
Well, y
From: Alan Tull
New bindings document for simple fpga bus.
Signed-off-by: Alan Tull
---
v9: initial version added to this patchset
v10: s/fpga/FPGA/g
replace DT overlay example with slightly more complicated example
move to staging/simple-fpga-bus
v11: No change in this patch for v11
From: Alan Tull
These patches are too late for this merge window; I'm submitting
them for those who are reviewing, especially the bindings.
Changes since v12:
Change DT property from "init-val" to "bridge-enable"
Use proposed DT common property "firmware-name" instead of "fpga-firmware"
Clean
Hi Stefano,
[auto build test ERROR on arm64/for-next/core]
[cannot apply to: xen-tip/linux-next]
[also ERROR on: v4.3 next-20151103]
url:
https://github.com/0day-ci/linux/commits/Stefano-Stabellini/xen-arm-arm64-CONFIG_PARAVIRT-and-stolen-ticks-accounting/20151104-002433
base: https
Jens Axboe writes:
>>> Certainly, the current behavior is undoubtedly broken. The least
>>> intrusive fix would be to kick off scheduling when we add it to the
>>> request, but the elevator should handle it. Are you going to be up
>>> for hacking up a fix?
>>
>> I have some trouble understanding
From: Alan Tull
Add a document spelling out usage of the simple fpga bus.
Signed-off-by: Alan Tull
Reviewed-by: Moritz Fischer
---
v9: Initial version of this patch in patchset
v10: s/fpga/FPGA/g
improve formatting
some rewriting
move to staging/simple-fpga-bus
v11: No change i
From: Alan Tull
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.
This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done. This framework is
be manufacturer-agnostic, all
From: Alan Tull
Add bindings documentation for Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Signed-off-by: Alan Tull
Signed-off-by: Matthew Gerlach
Signed-off-by: Dinh Nguyen
---
v2: separate into 2 documents for the 2 drivers
v12: bump version to line up with
From: Alan Tull
Supports Altera SOCFPGA bridges:
* fpga2sdram
* fpga2hps
* hps2fpga
* lwhps2fpga
Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.
The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on. Thi
From: Alan Tull
The Simple FPGA bus uses the FPGA Manager Framework and the
FPGA Bridge Framework to provide a manufactorer-agnostic
interface for reprogramming FPGAs that is Device Tree
Overlays-based.
When a Device Tree Overlay containing a Simple FPGA Bus is
applied, the Simple FPGA Bus will
This patch fixes a bug where a kernel warning is triggered when performing
a memory hotplug on ppc64. This warning may also occur on any architecture
that has multiple sections per memory block.
[ 78.300767] [ cut here ]
[ 78.300768] WARNING: at ../drivers/base/memory.c
Anyone knows why wasn't this merged a year ago? I didn't see any review
comments, and it
ended up finding real bugs.
On 11/14/2014 07:50 AM, Andrey Ryabinin wrote:
> Next spin of UBSan and there are two patches from now.
> "Two there should be; no more, no less. One to embody the UBSan,
> the oth
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