On Tue, 22 Sep 2015 15:16:32 -0700 Greg Thelen wrote:
> mem_cgroup_read_stat() returns a page count by summing per cpu page
> counters. The summing is racy wrt. updates, so a transient negative sum
> is possible. Callers don't want negative values:
> - mem_cgroup_wb_stats() doesn't want negativ
On Tue, 22 Sep 2015, Andy Shevchenko wrote:
> On Intel Galileo boards the GPIO expander is connected to i2c bus. Moreover it
> is able to generate interrupt, but interrupt line is connected to GPIO. That's
> why we have to have GPIO driver in place when we will probe i2c host with
> device connect
On Tue, 22 Sep 2015, Andy Shevchenko wrote:
> On Intel Galileo Gen2 the GPIO expanders are connected to the i2c bus. For
> those devices the ACPI table has specific parameters that refer to an actual
> i2c host controller. Since MFD now copes with that specific configuration we
> have to provide a
Jiang Liu wrote on 22/09/15 17:00:
Previously the eata driver just grabs and accesses eata PCI devices
without implementing a PCI device driver, that causes troubles with
latest IRQ related
Commit 991de2e59090 ("PCI, x86: Implement pcibios_alloc_irq() and
pcibios_free_irq()") changes the way t
The mm-of-the-moment snapshot 2015-09-22-15-28 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You wi
On Sat, Sep 19, 2015 at 10:27:17AM -0700, Greg Kroah-Hartman wrote:
> 3.10-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Markus Pargmann
>
> commit 06d2f6ca5a38abe92f1f3a132b331eee773868c3 upstream.
>
> This patch adds selects for IIO_
On Saturday, September 19, 2015 05:52:50 PM Richard Guy Briggs wrote:
> A bug was introduced by "audit: try harder to send to auditd upon
> netlink failure", caused by incomplete code and a function that expects
> a string and does not accept a format plus arguments. Create a
> temporary string va
On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote:
> Here is what I get in asm. First one is with "if (i) mb();". We see gcc
> puts a beqlr. This is the form that is closest to what we had in the
> former misc_32.S
> Second one if with "mb()". Here we get a branch to sync for a useless sy
On Tue, Sep 22, 2015 at 10:21:10AM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> API to support programming FPGA's.
>
> The following functions are exported as GPL:
> * fpga_mgr_buf_load
>Load fpga from image in buffer
>
> * fpga_mgr_firmware_load
>Request firmware and
On 09/17, Xing Zheng wrote:
> +
> +static void rockchip_rk3036_pll_init(struct clk_hw *hw)
init ops are "discouraged". Could we do this through assigned
rates instead?
> +{
> + struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw);
> + const struct rockchip_pll_rate_table *rate;
> +
On Thu, 03 Sep 2015, Aaron Sierra wrote:
> The lpc_ich_cells array gives the wrong impression about the
> relationship between the watchdog and GPIO devices. They are
> completely distinct devices, so this patch separates the
> array into distinct mfd_cell structs per device.
>
> A side effect of
On Tue, 22 Sep 2015 15:16:27 -0700
Joe Stringer wrote:
> On 22 September 2015 at 15:05, Steven Rostedt wrote:
> >
> > The attached config gives the following error:
> >
> > net/built-in.o: In function `handle_fragments':
> > net/openvswitch/conntrack.c:316: undefined reference to `nf_ct_frag6_ga
On Wed, 2015-09-23 at 07:55 +0930, Arthur Marsh wrote:
>
> Jiang Liu wrote on 22/09/15 17:00:
> > Previously the eata driver just grabs and accesses eata PCI devices
> > without implementing a PCI device driver, that causes troubles with
> > latest IRQ related
> >
> > Commit 991de2e59090 ("PCI, x8
On 09/21/2015 07:33 AM, Bjorn Andersson wrote:
On Mon 03 Aug 09:48 PDT 2015, Georgi Djakov wrote:
This patchset adds initial support for the clocks controlled by
the RPM (Resource Power Manager) processor on Qualcomm platforms.
It depends on Bjorn's Qualcomm SMD & RPM patches, that are now in
l
Le 23/09/2015 00:34, Scott Wood a écrit :
On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote:
>Here is what I get in asm. First one is with "if (i) mb();". We see gcc
>puts a beqlr. This is the form that is closest to what we had in the
>former misc_32.S
>Second one if with "mb()". Here
On Tue, Sep 22, 2015 at 10:21:11AM -0500, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Add driver to fpga manager framework to allow configuration
> of FPGA in Altera SoCFPGA parts.
>
> Signed-off-by: Alan Tull
> Acked-by: Michal Simek
> Acked-by: Moritz Fischer
[..]
> +++ b/drive
On Wed, 2015-09-23 at 00:49 +0200, Christophe Leroy wrote:
> Le 23/09/2015 00:34, Scott Wood a écrit :
> > On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote:
> > > > Here is what I get in asm. First one is with "if (i) mb();". We see
> > > > gcc
> > > > puts a beqlr. This is the form that
Hi Chao,
On Tue, Sep 22, 2015 at 09:18:18PM +0800, Chao Yu wrote:
> We pass 'nfree' to has_not_enough_free_secs to check whether there is
> enough free section, but 'nfree' indicates the number of segment gced,
> should alter the value to section number.
Yeah, but I think we need to increase nfre
Hi Stephen,
Am Dienstag, 22. September 2015, 15:41:25 schrieb Stephen Boyd:
> On 09/17, Xing Zheng wrote:
> > +
> > +static void rockchip_rk3036_pll_init(struct clk_hw *hw)
>
> init ops are "discouraged". Could we do this through assigned
> rates instead?
really? According to Mike that was a val
On Tue, 22 Sep 2015, Oleg Nesterov wrote:
> Finally. Whatever we do, we need to change oom_kill_process() first,
> and I think we should do this regardless. The "Kill all user processes
> sharing victim->mm" logic looks wrong and suboptimal/overcomplicated.
> I'll try to make some patches tomorrow
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:52 +0200
> Unsigned minus constant is still unsigned so checking its sign makes no
> sense.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:50 +0200
> phy_mode can be negative.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
>
> Signed-off-by
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:59 +0200
> skb->len is always non-negative.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
>
> Signed
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:55 +0200
> Thresholds uses -1 to indicate that default value should be used.
> Since thresholds are unsigned sign checking makes no sense.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_t
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:51 +0200
> Variable can store negative values.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576
>
> Sig
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:49 +0200
> Difference of unsigned values is also unsigned so it does not make
> sense to check its sign.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http
From: Andi Kleen
The load balancing from input pool to output pools was
essentially unlocked. Before it didn't matter much because
there were only two choices (blocking and non blocking).
But now with the distributed non blocking pools we have
a lot more pools, and unlocked access of the counter
From: Andi Kleen
Now that we have multiple nonblocking_pools it makes sense to report
the name of the pool in the urandom_read trace point. Extend
the trace point to report the name too.
Signed-off-by: Andi Kleen
---
drivers/char/random.c | 2 +-
include/trace/events/random.h | 10 +++
Hi Andy,
Am Donnerstag, 17. September 2015, 19:07:06 schrieb Andy Yan:
> On 2015年09月10日 02:05, Simon Glass wrote:
> > Hi,
> >
> > On 8 September 2015 at 16:46, Heiko Stübner wrote:
> >> Hi Andy,
> >>
> >> Am Dienstag, 8. September 2015, 20:43:07 schrieb Andy Yan:
> >>> rockchip platform have a
From: Andi Kleen
We had a case where a 4 socket system spent >80% of its total CPU time
contending on the global urandom nonblocking pool spinlock. While the
application could probably have used an own PRNG, it may have valid
reasons to use the best possible key for different session keys.
The a
On 09/23, Heiko Stübner wrote:
> Hi Stephen,
>
> Am Dienstag, 22. September 2015, 15:41:25 schrieb Stephen Boyd:
> > On 09/17, Xing Zheng wrote:
> > > +
> > > +static void rockchip_rk3036_pll_init(struct clk_hw *hw)
> >
> > init ops are "discouraged". Could we do this through assigned
> > rates i
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:53 +0200
> To avoid underflows signed variables should be used in expression.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].
>
> [1]: http://permalink.gmane.org/gman
From: Andrzej Hajda
Date: Mon, 21 Sep 2015 15:33:54 +0200
> Thresholds uses -1 to indicate that default value should be used.
> Since thresholds are unsigned sign checking makes no sense.
>
> The problem has been detected using proposed semantic patch
> scripts/coccinelle/tests/unsigned_lesser_t
The Management Complex (MC) binary interface added a new "flags"
field to the command header.
Add the definitions for this field in preparation for adding the
new cmd_flags parameter to all MC interface APIs.
Signed-off-by: J. German Rivera
---
drivers/staging/fsl-mc/include/mc-cmd.h | 30 ++
Add cmd_flags parameter to all dpmng APIs to comply
with 8.0 MC firmware interface. Updated MC version
major number.
---
drivers/staging/fsl-mc/bus/dpmng.c | 14 ++
drivers/staging/fsl-mc/bus/mc-bus.c| 4 ++--
drivers/staging/fsl-mc/include/dpmng.h | 14 ++
3 files
Add cmd_flags parameter to all dprc APIs to comply
with the dprc 4.0 MC interface. Updated MC version
major number. Pass irq args in struct instead of
separate args.
dprc 4.0 uses MC-relative offsets to specify object regions,
instead of physical addresses. So, translate_mc_addr() and
struct fsl_
Andi Kleen writes:
>
> With the patchkit applied:
>
> 1 node: 1x
> 2 nodes: 2x
> 3 nodes: 3.4x
> 4 nodes: 6x
Sorry there was a typo in the numbers. Correct results are:
With the patchkit applied:
1 node: 1x
2 nodes: 2x
3 nodes: 2.4x
4 nodes: 3x
So it's not quite linear scalab
On Tue, Sep 22, 2015 at 02:25:19PM -0700, Dan Williams wrote:
> On Tue, Sep 22, 2015 at 2:13 PM, Andrew Morton
> wrote:
> > On Tue, 22 Sep 2015 13:36:22 -0600 Ross Zwisler
> > wrote:
> >
> >> The following commit:
> >>
> >> commit 46c043ede471 ("mm: take i_mmap_lock in unmap_mapping_range() for
The oom killer takes task_lock() in a couple of places solely to protect
printing the task's comm.
A process's comm, including current's comm, may change due to
/proc/pid/comm or PR_SET_NAME.
The comm will always be NULL-terminated, so the worst race scenario would
only be during update. We can
the OOM killer. */
> clone(trigger, malloc(4096)+ 4096, CLONE_SIGHAND | CLONE_VM, NULL);
> /* Deplete all memory reserve using the time lag. */
> for (i = size; i; i -= 4096)
> buf[i - 1] = 1;
> return * (char *) NULL; /* Kill all threads. */
> }
>
Add cmd_flags parameter to all dpbp APIs to comply
with the dpmcp 2.0 MC interface. Updated version
major number. Pass irq args in struct instead of
separate args.
Signed-off-by: J. German Rivera
---
drivers/staging/fsl-mc/bus/dpmcp-cmd.h| 2 +-
drivers/staging/fsl-mc/bus/dpmcp.c|
James Bottomley wrote on 23/09/15 08:15:
On Wed, 2015-09-23 at 07:55 +0930, Arthur Marsh wrote:
Jiang Liu wrote on 22/09/15 17:00:
Previously the eata driver just grabs and accesses eata PCI devices
without implementing a PCI device driver, that causes troubles with
latest IRQ related
Commi
Add cmd_flags parameter to all dpbp APIs to comply
with the dpbp 2.0 MC interface. Updated MC version
major number. Pass irq args in struct instead of
separate args.
Signed-off-by: J. German Rivera
---
drivers/staging/fsl-mc/bus/dpbp.c | 136 --
drivers/stagin
The DPAA2 management complex has a versioned binary interface
that has to be kept in sync with the DPAA2 drivers. This patch
series uprevs the APIs that build MC commands and parse results.
This uprev is needed to support object interrupts.
MC binary interface changes
-overall version from 6.0
dpcon object minor version number updated to match latest
MC firmware. This change is needed because the dpcon
object binds to the allocator and the current driver match
logic uses object version numbers.
Signed-off-by: J. German Rivera
---
drivers/staging/fsl-mc/include/dpcon-cmd.h | 2 +-
1 fi
From: David Daney
In the case where the PCI_PROBE_ONLY flag is set, we need to claim the
resources for all PCI devices added to the bus. Failure to claim
SRIOV BAR resources prevents SRIOV devices from being being enabled.
So, when the PCI_PROBE_ONLY flag is set, claim MEM and IO resources
for
From: David Daney
pci_bus_fixup_irqs() works like pci_fixup_irqs(), except it only does
the fixups for devices on the specified bus.
Follow-on patch will use the new function.
Signed-off-by: David Daney
---
No change from v2.
This patch didn't exist in v1 of the set.
drivers/pci/setup-irq.c
From: David Daney
If the bus is being configured with a bus-range that does not start at
zero, pass that starting bus number to pci_scan_root_bus(). Passing
the incorrect value of zero causes attempted config accesses outside
of the supported range, which cascades to an OOPs spew and eventual
ke
From: David Daney
The pci-host-generic driver keeps a global struct pci_ops which it
then patches with the .map_bus method appropriate for the bus device.
A problem arises when the driver is used for two different types of
bus devices, the .map_bus method for the last device probed clobbers
the m
On Mon, 2015-09-21 at 16:47 +0100, Sudeep Holla wrote:
> mpic_irq_set_wake return -ENXIO for non FSL MPIC and sets IRQF_NO_SUSPEND
> flag for FSL ones. enable_irq_wake already returns -ENXIO if irq_set_wak
> is not implemented. Also there's no need to set the IRQF_NO_SUSPEND flag
> as it doesn't gu
From: David Daney
There are two problems with the bus_max calculation:
1) The u8 data type can overflow for large config space windows.
2) The calculation is incorrect for a bus range that doesn't start at
zero.
Since the configuration space is relative to bus zero, make bus_max
just be the
From: David Daney
If we create multiple buses with pci-host-generic, or there are buses
created by other drivers, we don't want to call pci_fixup_irqs() which
operates on all devices, not just the devices on the bus being added.
The consequence is that either the fixups are done more than once, o
From: David Daney
While using the pci-host-generic driver to add PCI support for the
Cavium ThunderX processors, several bugs were discovered. This patch
set fixes the bugs, a follow-on set will add the ThunderX support.
Changes from v2:
- Added " PCI: generic: Claim device resources if PCI_
quot;)
I have used the berlin tree from next-20150922 for today.
--
Cheers,
Stephen Rothwells...@canb.auug.org.au
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
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More majordomo info at htt
Hi Sakari,
On Wed, Sep 23, 2015 at 4:37 AM, Sakari Ailus wrote:
> Hi Robin,
>
> On Tue, Sep 22, 2015 at 04:37:17PM +0100, Robin Murphy wrote:
>> Hi Hans,
>>
>> On 21/09/15 14:13, Hans Verkuil wrote:
>> >Hi Tiffany!
>> >
>> >On 21-09-15 14:26, Tiffany Lin wrote:
>> >>vb2_dc_prepare use the number
With the split into struct clk and struct clk_core, clocks lost the
ability for nested __clk_get clkdev calls. While it stays possible to
call __clk_get, the first call to (__)clk_put will clear the struct clk,
making subsequent clk_put calls run into a NULL pointer dereference.
One prime example
From: David Daney
The device tree property "msi-map" specifies how to create the PCI
requester id used in some MSI controllers. Add a new function
of_msi_map_rid() that finds the msi-map property and applies its
translation to a given requester id.
Signed-off-by: David Daney
---
drivers/of/ir
From: Mark Rutland
Currently msi-parent is used by a few bindings to describe the
relationship between a PCI root complex and a single MSI controller, but
this property does not have a generic binding document.
Additionally, msi-parent is insufficient to describe more complex
relationships betwe
From: David Daney
Call of_msi_map_rid() to handle mapping of the requester id.
Signed-off-by: David Daney
---
drivers/irqchip/irq-gic-v3-its-pci-msi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c
b/drivers/irqchip/irq-gic-v3-it
From: David Daney
The first patch from Mark Rutland adds the OF device tree binding
description, which explains what we are attempting to do here. For
MSI messages on GICv3 systems there is some side-band data that
accompanies the message, this data is specified in the OF device tree
"msi-map" p
On 09/22/15 at 12:54pm, Andrew Morton wrote:
> > --- a/arch/x86/kernel/setup.c
> > +++ b/arch/x86/kernel/setup.c
> > @@ -493,7 +493,7 @@ static void __init
> > memblock_x86_reserve_range_setup_data(void)
> > # define CRASH_KERNEL_ADDR_HIGH_MAXMAXMEM
> > #endif
> >
> > -static void __in
The lpc_ich_cells array gives the wrong impression about the
relationship between the watchdog and GPIO devices. They are
completely distinct devices, so this patch separates the
array into distinct mfd_cell structs per device.
A side effect of removing the array, is that the lpc_cells enum
is no
On Wed, 23 Sep 2015 08:02:55 +0800 Baoquan He wrote:
> >
> > > }
> > >
> > > low_base = memblock_find_in_range(low_size, (1ULL<<32),
> > > low_size, alignment);
> > >
> > > if (!low_base) {
> > > - if (!auto_set)
> > > - pr_info
On Tue, Sep 22, 2015 at 08:25:40AM -0700, Paul E. McKenney wrote:
> On Tue, Sep 22, 2015 at 07:37:04AM +0800, Boqun Feng wrote:
> > On Tue, Sep 22, 2015 at 07:26:56AM +0800, Boqun Feng wrote:
> > > On Mon, Sep 21, 2015 at 11:24:27PM +0100, Will Deacon wrote:
> > > > Hi Boqun,
> > > >
> > > > On Su
From: David Daney
The Cavium ThunderX SoC needs a PCI quirk for its on-chip bridges.
Since it is arm64, create a new quirks.c file there to contain arm64
related quirks. Add the ThunderX bridge quirk, gated by a new config
variable, so that it can be disabled for kernels that aren't expected
to
Add the device tree bindings document for the TI Wakeup M3 IPC
device on AM33xx and AM43xx SoCs. These devices are used by the
TI wkup_m3_ipc driver, and contain the registers upon which the
IPC protocol to communicate with the Wakeup M3 processor is
implemented.
Signed-off-by: Dave Gerlach
Signe
Hi,
This series is version 3 of the code to introduce a wkup_m3_ipc driver
to handle communication between the MPU and Cortex M3 present on TI AM335x
and AM437x SoCs. v2 of this series can be found at [1]. Only patch 3
has been changed based on a request from Tony and a few cleanups:
- Rather than
The mailbox framework controls the transmission queue and requires
either its controller implementations or clients to run the state
machine for the Tx queue. The OMAP mailbox controller uses a Tx-ready
interrupt as the equivalent of a Tx-done interrupt to run this Tx
queue state-machine.
The Wkup
From: David Daney
The config space for external PCIe root complexes on some Cavium
ThunderX SoCs is very similar to CAM and ECAM, but differs in the
shift values that have to be applied to the bus and devfn numbers to
compose that address window offset. These root complexes also have
the interes
Introduce a wkup_m3_ipc driver to handle communication between the MPU
and Cortex M3 wkup_m3 present on am335x.
This driver is responsible for actually booting the wkup_m3_rproc and
also handling all IPC which is done using the IPC registers in the control
module, a mailbox, and a separate interru
On Tue, 2015-09-22 at 03:10 -0500, Zhao Qiang-B45475 wrote:
> On Tue, Sep 22, 2015 at 06:47 AM +0800, Wood Scott-B07421 wrote:
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, September 22, 2015 6:47 AM
> > To: Zhao Qiang-B45475
> > Cc: linux-kernel@vger.kernel.org; lin
On 09/22/15 at 05:08pm, Andrew Morton wrote:
> On Wed, 23 Sep 2015 08:02:55 +0800 Baoquan He wrote:
>
> > >
> > > > }
> > > >
> > > > low_base = memblock_find_in_range(low_size, (1ULL<<32),
> > > > low_size, alignment);
> > > >
> > > >
On Mon, 21 Sep 2015, Grigoryev Denis wrote:
> When tps6105x used in TPS6105X_MODE_SHUTDOWN mode the driver calls
> mfd_add_devices() with mfd_cell->name == NULL, that causes an ooops in
> platform_device_register() later.
>
> This patch adds an mfd_cell for each possible mode thereby excluding
>
On Tue, 22 Sep 2015, Aaron Sierra wrote:
> The lpc_ich_cells array gives the wrong impression about the
> relationship between the watchdog and GPIO devices. They are
> completely distinct devices, so this patch separates the
> array into distinct mfd_cell structs per device.
>
> A side effect of
On Mon, Sep 07, 2015 at 01:51:35PM +0530, Sanchayan Maity wrote:
> Add clock support for Vybrid On-Chip One Time Programmable
> (OCOTP) controller.
>
> While the OCOTP block does not require explicit clock gating,
> for programming the OCOTP timing register the clock rate of
> ipg clock is require
On Mon, 21 Sep 2015, Emilio López wrote:
> Some EC implementations include a small nvram space used to store
> verified boot context data. This boolean property lets us indicate
> whether this space is available or not on a specific EC implementation.
>
> Signed-off-by: Emilio López
> ---
>
> P
From: Dmitry Vyukov
Date: Tue, 22 Sep 2015 10:51:52 +0200
> rhashtable_rehash_one() uses complex logic to update entry->next field,
> after INIT_RHT_NULLS_HEAD and NULLS_MARKER expansion:
>
> entry->next = 1 | ((base + off) << 1)
>
> This can be compiled along the lines of:
>
> entry->next = b
From: Neil Armstrong
Date: Tue, 22 Sep 2015 11:28:14 +0200
> The Marvell Egress rx trailer check must be fixed to
> correctly detect bad bits in the third byte of the
> Eggress trailer as described in the Table 28 of the
> 88E6060 datasheet.
> The current code incorrectly omits to check the third
From: David Daney
When the Cavium mdio-octeon devices appear in the Thunder family of
arm64 based SoCs, they show up as PCI devices. Add PCI driver
wrapping so the driver is bound in the standard PCI device scan.
When in this form, a single PCI device may have more than a single
bus, we call th
Andrew Morton wrote:
> On Tue, 22 Sep 2015 15:16:32 -0700 Greg Thelen wrote:
>
>> mem_cgroup_read_stat() returns a page count by summing per cpu page
>> counters. The summing is racy wrt. updates, so a transient negative sum
>> is possible. Callers don't want negative values:
>> - mem_cgroup_wb
On Tuesday, September 22, 2015 04:34:19 PM Luiz Capitulino wrote:
> Hi,
Hi,
Please always CC patches related to power management to
linux...@vger.kernel.org.
Also CCing Len Brown who's the maintainer of the intel_idle driver and Peter Z.
> Some archs allow the system administrator to set the
>
Hi Alan,
On Tue, Sep 22, 2015 at 8:21 AM, wrote:
> From: Alan Tull
>
> Add a document on the new FPGA manager core.
>
Reviewed-by: Moritz Fischer
> Signed-off-by: Alan Tull
> ---
> v9: initial version where this patch was added
>
> v10: requested cleanups to formatting and otherwise
>
On Tue, Sep 22, 2015 at 8:21 AM, wrote:
> From: Alan Tull
>
> Add documentation under drivers/staging for new fpga manager's
> sysfs interface.
>
Reviewed-by: Moritz Fischer
> Signed-off-by: Alan Tull
> ---
> v5 : (actually second version, but keeping version numbers
> aligned with rest
On 21/09/15 15:12, Ray Jui wrote:
> This patch series cleans up the Broadcom Cygnus device tree files and makes it
> more consistent with the rest of Broadcom iProc device tree files. This patch
> series also enables various peripherals on Cygnus boards. They include:
>
> bcm11360_entphn:
> NAND
>
During evaluation of some performance data, it was discovered thread
and run queue run_delay accounting data was inconsistent with the other
accounting data that was collected. Further investigation found under
certain circumstances execution time was leaking into the task and
run queue accounting
* Sebastian Reichel [150922 14:04]:
> Hi Tony and Guan,
>
> I plan to merge the following patch, which changes
> CONFIG_BATTERY_BQ27x00 to CONFIG_BATTERY_BQ27xxx.
> This includes changes to omap2plus_defconfig and
> unicore32. Can you Ack this patch?
For omap2plus_defconfig:
Acked-by: Tony Lind
Hello
I am inspired to send you this email by the huge opportunity that it will be of
mutual benefit to us.My late client a national of Israel a Man who used to work
with Shell before his untimely death few years ago and inquiries to several
embassies to locate any of my clients extended relati
* Neil Armstrong [150922 02:01]:
> In case the DaVinci Emac is directly connected to a
> non-mdio PHY/device, it should be possible to provide
> a fixed link configuration in the DT.
>
> Signed-off-by: Neil Armstrong
Ethernet works for me with this patch:
Tested-by: Tony Lindgren
> ---
> dr
On 2015/9/22 21:35, Arnaldo Carvalho de Melo wrote:
Em Tue, Sep 22, 2015 at 03:34:32AM +, Wang Nan escreveu:
After commit 3d39ac538629e4f00a6e1c38d46346f1b8e69505 ("perf machine:
No need to have two DSOs lists"), perf probe with module short name doesn't
work again. For example:
# lsmod
2015-09-21 21:24 GMT+02:00 J. Bruce Fields :
> On Fri, Sep 18, 2015 at 05:56:11PM -0400, bfields wrote:
>> On Sat, Sep 05, 2015 at 12:27:17PM +0200, Andreas Gruenbacher wrote:
>> > + /*
>> > +* If the owner mask contains permissions which are not in the group
>> > +* mask, the group mask
Signed-of-by: Duson Lin
---
drivers/input/mouse/elan_i2c_core.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/input/mouse/elan_i2c_core.c
b/drivers/input/mouse/elan_i2c_core.c
index 16ac595..357670e 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++
In update_sit_info, we use div_u64 to handle 'u64 divide u64' case, but
div_u64 can only handle 32-bits divisor, so our divisor with u64 type
passed to div_u64 will overflow, result in the wrong calculation when
show debug info of f2fs as below:
BDF: 464, avg. vblocks: 23509
(BDF should never exce
Hi Feng,
On 09/22/2015 11:01 AM, Wu, Feng wrote:
>
>
>> -Original Message-
>> From: linux-kernel-ow...@vger.kernel.org
>> [mailto:linux-kernel-ow...@vger.kernel.org] On Behalf Of Eric Auger
>> Sent: Tuesday, September 22, 2015 3:46 AM
>> To: Paolo Bonzini; Wu, Feng; alex.william...@redhat
On 09/23/15 at 12:07am, Minfei Huang wrote:
> On 09/15/15 at 11:08am, Minfei Huang wrote:
> > On 09/14/15 at 04:44pm, Dave Young wrote:
> > > On 09/14/15 at 03:50pm, Minfei Huang wrote:
> > > > On 09/13/15 at 11:52am, Eric W. Biederman wrote:
> > > > > Minfei Huang writes:
> > > > >
> > > > > > k
On Tue, 22 Sep 2015, Andrey Konovalov wrote:
> On Tue, Sep 22, 2015 at 8:54 PM, Hugh Dickins wrote:
> > On Tue, 22 Sep 2015, Andrey Konovalov wrote:
> >> If anybody comes up with a patch to fix the original issue I easily
> >> can test it, since I'm hitting "BUG: Bad page state" in a second when
>
Here are my improvements; hope that helps ...
Thanks,
Andreas
diff --git a/fs/richacl_compat.c b/fs/richacl_compat.c
index 9b76fc0..21af9a0 100644
--- a/fs/richacl_compat.c
+++ b/fs/richacl_compat.c
@@ -351,26 +351,26 @@ richacl_propagate_everyone(struct richacl_alloc *alloc)
struct richa
On Wed, Sep 23, 2015 at 03:39:44AM +0200, Andreas Gruenbacher wrote:
> Here are my improvements; hope that helps ...
Yes, looks good, thanks!--b.
>
> Thanks,
> Andreas
>
> diff --git a/fs/richacl_compat.c b/fs/richacl_compat.c
> index 9b76fc0..21af9a0 100644
> --- a/fs/richacl_compat.c
> +++ b/
On Tue, Sep 22, 2015 at 09:15:58AM -0700, Matt Roper wrote:
> On Tue, Sep 22, 2015 at 05:13:55PM +0200, Daniel Vetter wrote:
> > On Tue, Sep 22, 2015 at 08:00:17AM -0700, Jesse Barnes wrote:
> > > Cc'ing Maarten and Matt; I'm guessing this may be related to one of
> > > their recent patches.
>
Jens, Ulf,
I've run into a basic issue: BLK_SECDISCARD takes 15-35 minutes
perform a secure erase of ~23GB (mostly empty) partition on a 32GB
eMMC part (happens with two vendors). One of the vendors says it
should take less than 60 seconds. I've confirmed erasing 2GB takes
only ~6 seconds - so the
Hi all,
In IOMMU architecture , how to make two different peripherals share the same
page table ?
In other words , is there a mechanism or structure to make two peripherals get
completely different address.
eg:
peri-A、peri-B and peri-C share the same iova address 0-1G for some performance
re
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