This series (based on v4.1-rc2) implements multi-PMU support for 32-bit
ARM systems, allowing all CPU PMUs to be used in big.LITTLE
configurations. Later series will factor out the core code to drivers,
and migrate the arm64 perf code over to this shared core.
PMUs for different microarchitectures
To support multiple PMUs we'll need to pass the arm_pmu instance around.
Update of_pmu_irq_cfg to take an arm_pmu, and acquire the platform
device from this.
Signed-off-by: Mark Rutland
Acked-by: Will Deacon
---
arch/arm/kernel/perf_event_cpu.c | 7 ---
1 file changed, 4 insertions(+), 3 de
Now that we can describe PMUs in heterogeneous systems, the only item in
the way of perf support for big.LITTLE is the singleton cpu_pmu variable
used for OProfile compatibility.
Signed-off-by: Mark Rutland
Acked-by: Will Deacon
---
arch/arm/kernel/perf_event_cpu.c | 27
In heterogeneous systems, the number of counters may differ across
clusters. To find the number of counters for a cluster, we must probe
the PMU from a CPU in that cluster.
Signed-off-by: Mark Rutland
Reviewed-by: Will Deacon
---
arch/arm/kernel/perf_event_v7.c | 48
The dts for the CoreTile Express A15x2 A7x3 (TC2) only describes the
PMUs of the Cortex-A15 CPUs, and not the Cortex-A7 CPUs.
Now that we have a mechanism for describing disparate PMUs and their
interrupts in device tree, this patch makes use of these to describe the
PMUs for all CPUs in the syste
In multi-cluster systems, the PMUs can be different across clusters, and
so our logical PMU may not be able to schedule events on all CPUs.
This patch adds a cpumask to encode which CPUs a PMU driver supports
controlling events for, and limits the driver to scheduling events on
those CPUs, and ena
Different CPU microarchitectures implement different PMU events, and
thus events which can be scheduled on one microarchitecture cannot be
scheduled on another, and vice-versa. Some archicted events behave
differently across microarchitectures, and thus cannot be meaningfully
summed. Due to this, w
On Wed, 13 May 2015 21:37:43 +0530
"Shreyas B. Prabhu" wrote:
> trace_mm_page_pcpu_drain, trace_kmem_cache_free, trace_mm_page_free
> and trace_tlb_flush can be potentially called from an offlined cpu.
> Since trace points use RCU and RCU should not be used from offlined
> cpus, we have checks to
On Tue, May 12, 2015 at 07:31:37PM -0400, Sasha Levin wrote:
> __btrfs_close_devices() would call_rcu to free the device, which is racy with
> list_for_each_entry() accessing the memory to retrieve the next device on the
> list.
>
> Signed-off-by: Sasha Levin
Reviewed-by: David Sterba
--
To uns
Lee,
On Wed, May 13, 2015 at 7:39 AM, Lee Jones wrote:
> On Mon, 04 May 2015, Andrew Bresticker wrote:
>
>> Add a binding document for the XUSB host complex on NVIDIA Tegra124
>> and later SoCs. The XUSB host complex includes a mailbox for
>> communication with the XUSB micro-controller and an x
Fix the following compiler warning:
drivers/clk/clk-axm5516.c: In function 'axmclk_probe':
drivers/clk/clk-axm5516.c:559:2: warning: format '%u' expects argument of type
'unsigned int', but argument 2 has type 'size_t' [-Wformat=]
pr_info("axmclk: supporting %u clocks\n", num_clks);
^
Sign
On Wed, May 13, 2015 at 03:48:42PM +0200, Ingo Molnar wrote:
> From 93f6bd67b4348bf4bf27cbac8ffa9f1def4fa6aa Mon Sep 17 00:00:00 2001
> From: Ingo Molnar
> Date: Wed, 13 May 2015 10:30:11 +0200
> Subject: [PATCH] Documentation/arch: Add Documentation/arch-features.txt
>
> Add a support matrix for
2015-05-13 17:28 GMT+02:00 Arnd Bergmann :
> On Wednesday 13 May 2015 16:20:34 Daniel Thompson wrote:
>> For the all reset bits:
>>
>>clock idx = reset idx + 256
>>
>> The opposite is not true; the clock bits are a superset of the reset
>> bits (the reset bits act on cells but some cells have >
Lee,
On Wed, May 13, 2015 at 7:37 AM, Lee Jones wrote:
> On Mon, 04 May 2015, Andrew Bresticker wrote:
>
>> Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124
>> and later SoCs.
>
> What else does it do besides USB?
Nothing - it's just the xHCI host controller and mailbox. As
On Wed, May 13, 2015 at 10:53:33AM -0500, nzimmer wrote:
> I am just noticed a hang on my largest box.
> I can only reproduce with large core counts, if I turn down the
> number of cpus it doesn't have an issue.
>
Odd. The number of core counts should make little a difference as only
one CPU per
On Wed, May 13, 2015 at 06:07:28AM -0700, Paul E. McKenney wrote:
> On Tue, May 12, 2015 at 05:59:29PM -0700, j...@joshtriplett.org wrote:
> > On Tue, May 12, 2015 at 03:49:12PM -0700, Paul E. McKenney wrote:
> > > From: "Paul E. McKenney"
> > >
> > > Reported-by: "Ahmed, Iftekhar"
> > > Signed-
On Wed, 2015-05-13 at 15:23 +0300, Purcareata Bogdan wrote:
> Ping?
>
> On 24.03.2015 12:43, Bogdan Purcareata wrote:
> > After previous discussions regarding the subject [1][2], there's no clear
> > explanation or reason why the call was needed in the first place. The
> > sensible
> > argument i
Please find in this patchset a driver implementation that conforms
to the coresight framework and provide support for the Embedded
Trace Macrocell version 4.
Regards,
Mathieu
---
Changes for v4:
- Restored cell ID 0x0003b95d.
- breakdown of multi-line output in sysfs entries.
Mathieu Poir
From: Pratik Patel
Tracers can be configured with various options at synthesis
time and knowing what resources are available is important for
SW configuration purposes.
As such adding RO sysfs entries for characteristics related to the
tracer implementation.
Signed-off-by: Pratik Patel
Signed-
From: Pratik Patel
Adding sysfs entries related to the counter functionality, more
specifically to set, control and reload the counters.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 26
drivers/hwtracing/coresight/co
From: Pratik Patel
Adding sysfs entries to control the selection of the resources the
trace unit will use as triggers to perform a trace run.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 12
drivers/hwtracing/coresigh
From: Pratik Patel
Adding sysfs entries to access and configure specifics about the
context ID comparator functions.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 19 +++
drivers/hwtracing/coresight/coresight-etm4x.c
From: Pratik Patel
Adding sysfs entries to access and configure specifics about the
virtual machine ID comparator functions.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 20 +++
drivers/hwtracing/coresight/coresight-etm4x
ETM ID registers contain valuable information about the capabilities
of the implementation and are very useful when configuring the device for
various trace scenarios.
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 90 ++
drivers/hwtra
Having access to the ETMv4 management registers is very useful as they
give meaningful information on how the IP block has been configured at
synthesis time.
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 77 ++
drivers/hwtracing/cores
From: Pratik Patel
Adding sysfs entries to access the sequencers related registers,
more specifically the sequencer state, the sequencer state
transition and the sequencer reset control registers.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresig
From: Pratik Patel
Adding sysfs entries to control the various mode the address comparator
registers can enact, i.e, start/top, single, and range. Also supplementing
with address comparator types configuration registers access, mandatory
to complete the configuration of the comparator functions.
On Wed, 2015-05-13 at 16:20 +0800, Yangbo Lu wrote:
> Enable interrupt mode to detect card instead of polling mode
> for P1020/P4080/P5020/P5040/T1040 by removing the quirk
> SDHCI_QUIRK_BROKEN_CARD_DETECTION. This could improve data
> transferring performance and avoid the call trace caused by
> p
On Wed, May 13, 2015 at 9:50 AM, Sudeep Holla wrote:
> On 13/05/15 14:46, Rob Herring wrote:
>> On Wed, May 13, 2015 at 5:03 AM, Sudeep Holla
>> wrote:
[...]
>>> Yes I read and was bit hesitant initially to do this change, but found
>>> no better way. I posted mainly to discuss other possibilit
From: Pratik Patel
This driver manages the CoreSight ETMv4 (Embedded Trace Macrocell) IP block
to support HW assisted tracing on ARMv7 and ARMv8 architectures.
Signed-off-by: Pratik Patel
Signed-off-by: Kaixu Xia
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-
From: Pratik Patel
Adding sysfs entries to control the ViewInst register's event
selector along with secure and non-secure exception level
instruction tracing.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 20 +
drivers
From: Pratik Patel
Adding sysfs entries to configure:
. global timestamp.
. how often trace synchronisation occur.
. the threashold value for cycle counting.
. branch and broadcasting regions.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Poirier
---
.../ABI/testing/sysfs-bus-coresight-d
On Wednesday 13 May 2015 18:29:05 Maxime Coquelin wrote:
> 2015-05-13 17:28 GMT+02:00 Arnd Bergmann :
> > On Wednesday 13 May 2015 16:20:34 Daniel Thompson wrote:
> >>
> >> That would suit me very well (although is the 0x20/0x40 not the 8 that
> >> we would need in the middle column).
> >
> > We do
From: Pratik Patel
Adding sysfs entries to:
. set the tracing entity with default values.
. set various mode associated to the tracing entity.
. select the processing entity the tracing entity relates to.
. select various events of interest.
Signed-off-by: Pratik Patel
Signed-off-by: Mathieu Po
> > + rdma_cap_ib_cm
> > + ---
> > +Communication Manager (CM) will handle the connections between
>^Connection Manager (CM) service, used to ease the process of
In IB terms, this is communication manager. It also handles transport level
address resolution for UD QPs.
On Wed, May 13, 2015 at 09:23:01PM +0800, zhengxing wrote:
> On 2015年05月13日 03:22, Mark Brown wrote:
> >Is it not possible to extend simple card to handle your use cases?
> >Given the very generic naming and the fact that things like jack
> >detection and so on should depend on the CODEC and board
On 05/13/2015 10:36 AM, Stephen Boyd wrote:
> On 05/12, Georgi Djakov wrote:
>> Add support for the msm8916 TCU clocks that are needed for IOMMU.
>>
>> Signed-off-by: Georgi Djakov
>> ---
>
> Applied to clk-next
>
Hi Stephen,
Just got a report that this patch has some issues - gcc_bimc_clk
may
On Wed, May 13, 2015 at 09:23:20PM +0800, zhengxing wrote:
> On 2015年05月13日 03:26, Mark Brown wrote:
> >This looks more like a normal and reasonable machine driver but then why
> >have you created the generic rockchip machine driver? It seems like
> >this should just be a regular machine driver l
On Wed, May 13, 2015 at 04:44:58PM +0200, Geert Uytterhoeven wrote:
> On Wed, May 13, 2015 at 4:28 PM, Paul Bolle wrote:
> > On Wed, 2015-05-13 at 15:41 +0200, Jonas Bonn wrote:
> >> openrisc.net is no more long story, not worth regurgitating.
> >
> > I see. What would you suggest as substitut
On Wed, May 13, 2015 at 12:21:18PM -0400, Nicholas Krause wrote:
> This removes the include statement for including the header file,
> linux/mm.h in the file, nvme-core.c due this driver file never
> calling any functions from the header file, linux/mm.h and
> only adding bloat to this driver by i
On Wed, 13 May 2015, Andrew Bresticker wrote:
> Lee,
>
> On Wed, May 13, 2015 at 7:39 AM, Lee Jones wrote:
> > On Mon, 04 May 2015, Andrew Bresticker wrote:
> >
> >> Add a binding document for the XUSB host complex on NVIDIA Tegra124
> >> and later SoCs. The XUSB host complex includes a mailbox
On Wed, 13 May 2015, Richard Fitzgerald wrote:
> For the WM5102 there is a dependency in the core code on wm5102_patch()
> which only exists when CONFIG_MFD_WM5102 is defined. To avoid having
> to sprinkle #ifdefs around the code it is given an alternative empty
> stub version when CONFIG_MFD_WM51
On Wed, 13 May 2015, Richard Fitzgerald wrote:
> The use of ifneq against 'n' to conditionally compile codec-specific
> parts is wrong and was resulting in all the codec tables being built
> even for deselected codecs.
>
> Signed-off-by: Richard Fitzgerald
> Acked-by: Lee Jones
> ---
> drivers
On Mon, Apr 27, 2015 at 5:10 PM, Sudeep Holla wrote:
> This patch adds support for System Control and Power Interface (SCPI)
> Message Protocol used between the Application Cores(AP) and the System
> Control Processor(SCP). The MHU peripheral provides a mechanism for
> inter-processor communicatio
On Mon, 2015-05-11 at 06:31 -0700, Greg KH wrote:
> This is the LAST 3.19.x kernel release, [...]
Canonical's kernel team will pick up stable maintenance where Greg KH
left off with v3.19.8 (thanks, Greg!)...
Canonical's Ubuntu kernel team is pleased to announce that we will be
providing extende
Hello PeterZ,
V7 is mostly trying to address all the issues you raised in V6. Please let me
know if you think any more changes that should be done to this.
Thanks,
Vikas
On Mon, 11 May 2015, Vikas Shivappa wrote:
This patch adds a cgroup subsystem to support the new Cache Allocation
featur
On Wed, May 13, 2015 at 09:27:57AM -0700, Josh Triplett wrote:
> How likely is this to get out of date? Are people going to remember to
> patch this when they add a feature to their architecture? If
> they found out they had work to do by reading this file, which is the
> goal, then they'll likel
2015-05-13 18:37 GMT+02:00 Arnd Bergmann :
> On Wednesday 13 May 2015 18:29:05 Maxime Coquelin wrote:
>> 2015-05-13 17:28 GMT+02:00 Arnd Bergmann :
>> > On Wednesday 13 May 2015 16:20:34 Daniel Thompson wrote:
>> >>
>> >> That would suit me very well (although is the 0x20/0x40 not the 8 that
>> >>
On 13/05/15 17:34, Rob Herring wrote:
On Wed, May 13, 2015 at 9:50 AM, Sudeep Holla wrote:
On 13/05/15 14:46, Rob Herring wrote:
On Wed, May 13, 2015 at 5:03 AM, Sudeep Holla
wrote:
[...]
Yes I read and was bit hesitant initially to do this change, but found
no better way. I posted main
On Wed, 13 May 2015, Mark Brown wrote:
> On Wed, May 13, 2015 at 04:43:33PM +0100, Lee Jones wrote:
> > On Wed, 29 Apr 2015, Lee Jones wrote:
>
> > > I'm in the same situation -- can't do anything without an Ack from Mark.
>
> > I happen to know that Mark regularly deletes his mail.
>
> > Can y
The output file format for openrisc has changed from "elf32-or32"
to "elf32-or1k" when using the or1k instead of the older or32 toochain.
Select the correct output format automatically to be able to compile
the kernel with both toolchain variants.
Cc: Stefan Kristiansson
Acked-by: Jonas Bonn
Sig
On Wed, May 13, 2015 at 03:41:42PM +0200, Jonas Bonn wrote:
> On 05/13/2015 03:33 PM, Paul Bolle wrote:
> >On Wed, 2015-05-13 at 06:20 -0700, Guenter Roeck wrote:
> >>Just remembered ... or just apply https://lkml.org/lkml/2014/9/19/11
> >>instead.
> >(That patch also suggests that "or12" in the p
Rasmus-
I think you're right - I was not paying close enough attention. In this
case, I think the real culprit appears to be something like libc incorrectly
sign-extending the mmap() offset argument. Calling mmap() with an offset of
0xf8000 is resulting in a pg_off of 0x8000 when the sysc
On Wed, May 13, 2015 at 9:50 AM, Lee Jones wrote:
> On Wed, 13 May 2015, Andrew Bresticker wrote:
>
>> Lee,
>>
>> On Wed, May 13, 2015 at 7:39 AM, Lee Jones wrote:
>> > On Mon, 04 May 2015, Andrew Bresticker wrote:
>> >
>> >> Add a binding document for the XUSB host complex on NVIDIA Tegra124
>>
Hi Tejun
>> >> + /* We use INT_MAX as the maximum value of pid_t. */
>> >> + if (limit < 0 || limit > INT_MAX)
>> >
>> > This is kinda weird if we're using PIDS_MAX for max as it may end up
>> > showing "max" after some larger number is written to the file.
>>
>> The reason for this is bec
On 13/05/15 17:52, Jassi Brar wrote:
On Mon, Apr 27, 2015 at 5:10 PM, Sudeep Holla wrote:
This patch adds support for System Control and Power Interface (SCPI)
Message Protocol used between the Application Cores(AP) and the System
Control Processor(SCP). The MHU peripheral provides a mechanis
On Wed, 13 May 2015, Matthew Wilcox wrote:
On Wed, May 13, 2015 at 12:21:18PM -0400, Nicholas Krause wrote:
This removes the include statement for including the header file,
linux/mm.h in the file, nvme-core.c due this driver file never
calling any functions from the header file, linux/mm.h and
On Wed, May 13, 2015 at 08:37:40AM -0700, Greg Kroah-Hartman wrote:
> You can easily bind drivers to devices today from userspace, why not
> just use the built-in functionality you have today if you "know" that
> there is no driver for this hardware.
So, that was my original suggestion too but pe
On Wed, May 13, 2015 at 2:57 AM, Jacek Anaszewski
wrote:
> Hi Toshi,
>
> On 05/13/2015 03:15 AM, Toshi Kikuchi wrote:
>>
>> Add the usage of the new attributes for master faders.
>>
>> Signed-off-by: Toshi Kikuchi
>> ---
>> Documentation/leds/leds-lp5523.txt | 30 ++
On 13/05/2015 14:58, Luiz Capitulino wrote:
> On Tue, 12 May 2015 19:17:24 -0400
> Sasha Levin wrote:
>
>> Hi all,
>>
>> I'm seeing odd jump in time values during boot of a KVM guest:
>>
>> [...]
>> [0.00] tsc: Detected 2260.998 MHz processor
>> [3376355.247558] Calibrating delay loop (
On Wed, May 13, 2015 at 06:13:00PM +0100, Mark Brown wrote:
> On Wed, May 13, 2015 at 08:37:40AM -0700, Greg Kroah-Hartman wrote:
>
> > You can easily bind drivers to devices today from userspace, why not
> > just use the built-in functionality you have today if you "know" that
> > there is no dri
On Wed, May 13, 2015 at 9:42 AM, Mark Brown wrote:
> On Wed, May 13, 2015 at 09:23:01PM +0800, zhengxing wrote:
>> On 2015年05月13日 03:22, Mark Brown wrote:
>
>> >Is it not possible to extend simple card to handle your use cases?
>> >Given the very generic naming and the fact that things like jack
>
Peter Zijlstra writes:
> @@ -4038,7 +4041,7 @@ void init_cfs_bandwidth(struct cfs_bandwidth *cfs_b)
> cfs_b->period = ns_to_ktime(default_cfs_period());
>
> INIT_LIST_HEAD(&cfs_b->throttled_cfs_rq);
> - hrtimer_init(&cfs_b->period_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
> +
32-bit ioctl uses these rather than the regular FS_IOC_* versions. They can be
handled in btrfs using the same code. Without this, 32-bit {ch,ls}attr fail.
Signed-off-by: Luke Dashjr
---
fs/btrfs/ioctl.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
This series restructures the Juno DT files and introduces the DT
for the new Juno R1. The board is an update of the Juno R0 with
support for PCIe, but the current series only brings the board to
parity with Juno R0. The series that enable the PCIe Generic Host
Bridge to be used on Juno R1 will be p
During the review of the Juno DT files I've noticed that the GIC
node label had two digits swapped leading to a different address
being shown in the /sys/devices fs.
Sudeep also pointed that public revisions of the Juno documentation
list a different frequency for the FAXI system than what the one
This board is based on Juno r0 with updated Cortex A5x revisions
and board errata fixes. It also contains coherent ThinLinks ports
on the expansion slot that allow for an AXI master on the daughter
card to participate in a coherency domain.
Support for SoC PCIe host bridge will be added as a separ
Prepare the device tree for adding more boards based on Juno r0.
Signed-off-by: Liviu Dudau
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 125 +
arch/arm64/boot/dts/arm/juno.dts | 122 +---
2 files changed, 126 insertions(+), 121 d
Juno contains a GICv2m extension for handling PCIe MSI messages.
Add a node declaring the first frame of the extension.
Signed-off-by: Liviu Dudau
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 35 --
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/a
Juno based boards have a memory mapped timer @ 0x2a81. This
is disabled on r0 version of the board due to an SoC errata.
Signed-off-by: Liviu Dudau
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/juno-bas
Tejun,
On 13.05.15 10:39:06, Tejun Heo wrote:
> On Tue, May 12, 2015 at 01:46:47PM +0200, Robert Richter wrote:
> > I don't think this is worth the effort as all internal and external
> > drivers need to be changed basically from:
> >
> > ahci_host_activate(host, irq, &ahci_sht);
> >
> > to:
>
Hello,
On Thu, May 14, 2015 at 03:04:52AM +1000, Aleksa Sarai wrote:
> Would you be okay with this?
>
> if (limit < 0 || limit >= PIDS_MAX)
>
> I'd prefer if we used PIDS_MAX as the maximum input value as well as
> being the internal representation of the maximum, rather than
> switching to
On Wed, May 13, 2015 at 05:54:19PM +0100, Lee Jones wrote:
> On Wed, 13 May 2015, Mark Brown wrote:
> > If you're looking for me to review something you need to send it to me,
> > and the chances of me looking at it are very much increased if there's a
> > relevant subject line. I'm CCed (not eve
On 13/05/15 12:14, Lars-Peter Clausen wrote:
> Hi,
>
> I'd like to go back to the issue of having one folder per trigger type and
> create triggers for a type in their respective folder.
>
> I'm not convinced that it is an intentional design restriction of configfs
> that we can't do this, but ra
On May 13, 2015, at 4:22 AM, Ingo Molnar wrote:
> * valdis.kletni...@vt.edu wrote:
>
>> On Tue, 12 May 2015 10:44:15 +0200, Ingo Molnar said:
>>
>>> ...
>>> Before I pushed out this -Wno-sign-compare change I made sure there
>>> are no extra warnings generated on the 8 key configs I monitor
>>
On 13/05/15 08:42, Vignesh R wrote:
>
>
> On Thursday 09 April 2015 07:49 PM, Jonathan Cameron wrote:
>> On 31/03/15 12:12, Vignesh R wrote:
>>> Add optional DT properties to set open delay, sample delay and number
>>> of averages per sample for each adc step. Open delay, sample delay
>>> and ave
On Wed, May 13, 2015 at 05:15:26PM +, Luke Dashjr wrote:
> 32-bit ioctl uses these rather than the regular FS_IOC_* versions. They can
> be
> handled in btrfs using the same code. Without this, 32-bit {ch,ls}attr fail.
>
> Signed-off-by: Luke Dashjr
> ---
> fs/btrfs/ioctl.c | 3 +++
> 1 fi
On Wed, May 13, 2015 at 10:20:28AM -0700, Greg Kroah-Hartman wrote:
> On Wed, May 13, 2015 at 06:13:00PM +0100, Mark Brown wrote:
> > So, that was my original suggestion too but people were complaining that
> > this wasn't a generally supported feature and requires specific support
> > of some kin
Lee Jones writes:
> On Tue, 05 May 2015, Eric Anholt wrote:
>
>> Stephen Warren writes:
>>
>> > On 05/04/2015 01:33 PM, Eric Anholt wrote:
>> >> There exists a tiny MMU, configurable only by the VC (running the
>> >> closed firmware), which maps from the ARM's physical addresses to bus
>> >> ad
Hi,
On Wed, Apr 22, 2015 at 06:46:58PM +0800, Pan Xinhui wrote:
> mxt_probe() may fail at last step, and the queue_work scheduled by
> request_firmware_nowait
> may run later and then access some data which is freed.
> To handle this error, add one mutex_lock to cover such case. It may cause
> m
From: Borislav Petkov
Pull it up into the header and kill duplicate versions. Separately, both
macros are identical:
35948b2bd3431aee7149e85cfe4becbc /tmp/a
35948b2bd3431aee7149e85cfe4becbc /tmp/b
Signed-off-by: Borislav Petkov
---
arch/x86/include/asm/asm.h | 25
From: Borislav Petkov
Just some trivial cleanups for things encountered recently, while
staring at code.
Borislav Petkov (3):
x86/lib/copy_user_nocache_64.S: Remove FIX_ALIGNMENT define
x86/asm: Unify ALIGN_DESTINATION macro
x86/lib/asm: Get rid of copy_user_nocache_64.S
arch/x86/include
On 13/05/15 08:28, Lars-Peter Clausen wrote:
> On 05/12/2015 09:06 PM, Jonathan Cameron wrote:
>> On 12/05/15 17:56, Lars-Peter Clausen wrote:
>>> On 05/08/2015 05:11 PM, Jonathan Cameron wrote:
On 16/04/15 05:01, Robert Dolca wrote:
> This patch adds a new function called iio_trigger_regi
From: Borislav Petkov
No code changed:
# arch/x86/lib/copy_user_nocache_64.o:
textdata bss dec hex filename
390 0 0 390 186 copy_user_nocache_64.o.before
390 0 0 390 186 copy_user_nocache_64.o.after
md5:
7fa0577b28700af89d
From: Borislav Petkov
Move __copy_user_nocache() to arch/x86/lib/copy_user_64.S and kill the
containing file.
No functionality change.
Signed-off-by: Borislav Petkov
---
arch/x86/lib/Makefile | 2 +-
arch/x86/lib/copy_user_64.S | 92 +++
ar
On Wed, May 13, 2015 at 05:31:05PM +0200, Michal Suchanek wrote:
> But you know, unused i2c bus can be also connected to "make the board
> catch fire" trace and nobody would notice until somebody has the great
> idea to probe it. Incidentally, both i2c and spi cs are active-low
> iirc.
Someone wo
>> Would you be okay with this?
>>
>> if (limit < 0 || limit >= PIDS_MAX)
>>
>> I'd prefer if we used PIDS_MAX as the maximum input value as well as
>> being the internal representation of the maximum, rather than
>> switching to something like INT_MAX.
>
> Yeah, that sounds okay to me but I fo
Hello, Robert.
On Wed, May 13, 2015 at 07:28:28PM +0200, Robert Richter wrote:
> > > This looks not very useful to do. Since irq is used only a single
> > > time, there is no reason to store it in the host's data structure. It
> >
> > Doesn't really matter tho.
>
> Since ahci_host_activate() is
On Thu, May 14, 2015 at 03:44:24AM +1000, Aleksa Sarai wrote:
> I think it's because we didn't want to expose PIDS_MAX to userspace.
> But we're not *really* exposing it, we're just enforcing the input
> limit for "max".
Ah, PIDS_MAX is fine then.
Thanks.
--
tejun
--
To unsubscribe from this li
On Tue, 12 May 2015, Geert Uytterhoeven wrote:
> On Tue, May 12, 2015 at 6:52 PM, Hans Ulli Kroll
> wrote:
> > - add missed ARCH_GEMINI (found by Paul)
> >
> > Hope I missed nothing ;-)
>
> As the driver uses readl(), perhaps it needs a dependency on HAS_IOMEM,
> to exclude the driver on UML?
>
On Wed, May 13, 2015 at 10:33 AM, Louis Langholtz wrote:
>
> Are warnings about sign-comparisons an architecture specific issue?
No, I think it's a combination of
(a) some architectures don't end up caring too much about warnings (I
guess you could call this an "architecture specific issue")
On 05/13/15 09:45, Georgi Djakov wrote:
> On 05/13/2015 10:36 AM, Stephen Boyd wrote:
>> On 05/12, Georgi Djakov wrote:
>>> Add support for the msm8916 TCU clocks that are needed for IOMMU.
>>>
>>> Signed-off-by: Georgi Djakov
>>> ---
>> Applied to clk-next
>>
> Hi Stephen,
> Just got a report tha
On 2015-04-27, Vagrant Cascadian wrote:
> On 2015-04-27, Shawn Guo wrote:
>> On Fri, Mar 27, 2015 at 01:23:00PM -0700, Vagrant Cascadian wrote:
>>> Add support for the USB armory board by Inverse Path. This board
>>> features a Freescale iMX53 SoC, 512MB RAM, and USB OTG operating in
>>> either per
Hi Greg,
On Wed, May 13, 2015 at 08:37:40AM -0700, Greg Kroah-Hartman wrote:
> On Wed, May 13, 2015 at 12:26:04PM +0100, Mark Brown wrote:
> > On Tue, May 12, 2015 at 10:33:24PM +0200, Maxime Ripard wrote:
> >
> > > While this is nicer than the DT solution because of its accurate hardware
> > > r
On 18/03/15 18:09, Brian Norris wrote:
> This could probably consolidate a few file listings. And it satisfies
> the spirit of the highly annoying [1] checkpatch warning for every new
> file, though it sadly won't quash it.
>
> [1] https://lkml.org/lkml/2014/12/17/24
>
> Signed-off-by: Brian Norr
On 12/05/15 17:53, Brian Norris wrote:
> Hi,
>
> This is the fourth (and final?) version of support for the Broadcom BCM7xxx
> Set-Top Box NAND controller. This controller has been used in a variety of
> Broadcom SoCs.
>
> Tested to work on Cygnus, BCM7445, and BCM63138.
Applied patches 4, 9 and
On 11/05/15 14:23, Ray Jui wrote:
> Hi Mike,
>
> Have you had a chance to review the iProc clock patches? If possible,
> I'd like to get feedback from you as early as possible so I can make
> changes if required. It would be really nice if we can get the iProc
> clock patches going into v4.2.
>
>
On 12/05/15 16:28, Brian Norris wrote:
> Signed-off-by: Brian Norris
Applied to devicetree/next, thanks!
--
Florian
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majo
On Wed, May 13, 2015 at 8:42 PM, Jonathan Cameron wrote:
>
> On 13/05/15 08:28, Lars-Peter Clausen wrote:
> > On 05/12/2015 09:06 PM, Jonathan Cameron wrote:
> >> On 12/05/15 17:56, Lars-Peter Clausen wrote:
> >>> On 05/08/2015 05:11 PM, Jonathan Cameron wrote:
> On 16/04/15 05:01, Robert Dol
Hello,
Ping? Any inputs?
On 15-05-11 10:41:37, Sanchayan Maity wrote:
> Hello,
>
> Currently this patchset is based of on our local branch but would like
> some comments before I push this to mainline through Shawn's tree.
>
> This patchset implements the following
> https://www.kernel.org/do
501 - 600 of 1014 matches
Mail list logo
