On Wed, May 13, 2015 at 4:09 PM, Michele Curti wrote:
> Tried to transpose rows with columns, to avoid architecture name duplication
> and to get only one table while keeping 80 char width, but result seems less
> readable :p
>
>
> m
>
On Fri, 01 May 2015, Lorenzo Pieralisi wrote:
> Current code in mfd-core calls into ACPI to check resources even
> on a system that booted with a DT (on kernels with both DT and ACPI
> support compiled in). This triggers ACPI exceptions since we may
> end up calling the ACPI interpreter when it ha
On Wed, May 13, 2015 at 4:28 PM, Paul Bolle wrote:
> On Wed, 2015-05-13 at 15:41 +0200, Jonas Bonn wrote:
>> openrisc.net is no more long story, not worth regurgitating.
>
> I see. What would you suggest as substitutes for:
> MAINTAINERS:W:http://openrisc.net
> MAINTAINERS:L:li
On Wed, 13 May 2015, Michal Hocko wrote:
> From: Michal Hocko
>
> MAP_LOCKED had a subtly different semantic from mmap(2)+mlock(2) since
> it has been introduced.
> mlock(2) fails if the memory range cannot get populated to guarantee
> that no future major faults will happen on the range. mmap(M
On Wed, 13 May 2015, Michal Hocko wrote:
> From: Michal Hocko
>
> David Rientjes has noticed that MAP_POPULATE wording might promise much
> more than the kernel actually provides and intend to provide. The
> primary usage of the flag is to pre-fault the range. There is no
> guarantee that no maj
On Wed, May 13, 2015 at 9:59 AM, Pantelis Antoniou
wrote:
> diff --git a/drivers/misc/bone_capemgr.c b/drivers/misc/bone_capemgr.c
> new file mode 100644
> index 000..423719c
> --- /dev/null
> +++ b/drivers/misc/bone_capemgr.c
> +static int capemgr_load_slot(struct bone_cape_slot *slot)
> +{
On Wed, 13 May 2015, Eric B Munson wrote:
> On Wed, 13 May 2015, Michal Hocko wrote:
>
> > From: Michal Hocko
> >
> > MAP_LOCKED had a subtly different semantic from mmap(2)+mlock(2) since
> > it has been introduced.
> > mlock(2) fails if the memory range cannot get populated to guarantee
> > t
On 13/05/15 14:46, Rob Herring wrote:
On Wed, May 13, 2015 at 5:03 AM, Sudeep Holla wrote:
On 12/05/15 23:55, Rob Herring wrote:
On Tue, May 12, 2015 at 12:38 PM, Sudeep Holla
wrote:
Commit 5590f3196b29 ("drivers/core/of: Add symlink to device-tree from
devices with an OF node") adds t
On Wed, May 13, 2015 at 04:37:59PM +0200, Richard Cochran wrote:
> On Wed, May 13, 2015 at 02:19:53PM +0200, Arnd Bergmann wrote:
> > Ah, very good. Extending this one function should be fairly straightforward,
> > just discuss with the PTP maintainer how to best do it.
>
> Sorry, I deleted the or
Hi,
This set is to address the issues that appear in userfaultfd usage
scenarios when the task monitoring the uffd and the mm-owner do not
cooperate to each other on VM changes such as remaps, madvises and
fork()-s.
This is the re-based set on the recent userfaultfd branch, two major
changes ar
I will need one to lookup for userfaultfd_wait_queue-s in different
wait queue.
Signed-off-by: Pavel Emelyanov
---
fs/userfaultfd.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/fs/userfaultfd.c b/fs/userfaultfd.c
index c89e96f..c593a72 100644
--- a/fs/u
The custom events are queued in ctx->event_wqh not to disturb the
fast-path-ed PF queue-wait-wakeup functions.
The events to be generated (other than PF-s) are requested in UFFD_API
ioctl with the uffd_api.features bits. Those, known by the kernel, are
then turned on and reported back to the user-
The event denotes that an area [start:end] moves to different
location. Lenght change isn't reported as "new" addresses if
they appear on the uffd reader side will not contain any data
and the latter can just zeromap them.
Waiting for the event ACK is also done outside of mmap sem, as
for fork eve
If the page is punched out of the address space the uffd reader
should know this and zeromap the respective area in case of
the #PF event.
Signed-off-by: Pavel Emelyanov
---
fs/userfaultfd.c | 26 ++
include/linux/userfaultfd_k.h| 10 ++
includ
When the mm with uffd-ed vmas fork()-s the respective vmas
notify their uffds with the event which contains a descriptor
with new uffd. This new descriptor can then be used to get
events from the child and populate its mm with data. Note,
that there can be different uffd-s controlling different
vma
Hi Guenter & Alexandre,
On 13 May 2015 14:47 Guenter Roeck wrote:
> On 05/13/2015 06:37 AM, Alexandre Belloni wrote:
> > On 13/05/2015 at 06:04:47 -0700, Guenter Roeck wrote :
> >> Don't know how this is handled for rtc drivers, but in other subsystems
> >> we just live with the original name. I d
On 05/09/2015 02:44 PM, Vinod Koul wrote:
>> This implementation is not tied to any DMA driver so it is possible to use
>> the
>> framework by other vendors, also ACPI version of binding can be easy enough
>> to
>> be added.
> I have applied all but last change to topic/omap
I can only find 6 pa
Hi
09.05.2015, 03:52, "David Fries" :
> A temperature conversion can take 750 ms and when possible the
> w1_therm slave driver drops the bus_mutex to allow other bus
> operations, but that includes operations such as a periodic slave
> search, which can remove this slave when it is no longer detec
On Tue, May 12, 2015 at 11:25:45PM +0800, hekuang wrote:
> Hi, jirka
>
> On 05/12/2015 08:37 PM, Jiri Olsa wrote:
> >On Tue, May 12, 2015 at 06:41:56AM +, He Kuang wrote:
> >
> >SNIP
> >
> >>$(Q)$(MAKE) $(build)=perf
> >>-$(OUTPUT)perf: $(PERFLIBS) $(PERF_IN)
> >>- $(QUIET_LINK)$(CC) $(C
From: Tuomas Tynkkynen
The DFLL is the main clocksource for the fast CPU cluster on Tegra124
and also provides automatic CPU rail voltage scaling as well. The DFLL
is a separate IP block from the usual Tegra124 clock-and-reset
controller, so it gets its own node in the device tree.
Signed-off-by
On Mon, 11 May 2015, Eric B Munson wrote:
> On Fri, 08 May 2015, Andrew Morton wrote:
>
> > On Fri, 8 May 2015 15:33:43 -0400 Eric B Munson wrote:
> >
> > > mlock() allows a user to control page out of program memory, but this
> > > comes at the cost of faulting in the entire mapping when it i
From: Tuomas Tynkkynen
Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the original clocksource.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
Acked
From: Tuomas Tynkkynen
Tegra CVB tables encode the relationship between operating voltage
and optimal frequency as a function of the so-called speedo value.
The speedo value is written to the on-chip fuses at the factory,
which allows the voltage-frequency operating points to be calculated
on an
From: Tuomas Tynkkynen
Add the board-specific properties of the DFLL for the Jetson TK1 board.
On this board, the DFLL will take control of the sd0 regulator on the
on-board AS3722 PMIC.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
Acked-by: Michael Turquette
---
arch/arm/b
Hi
13.05.2015, 10:27, "Vignesh R" :
> On Monday 04 May 2015 02:08 PM, Vignesh R wrote:
>> This patches makes following changes to omap_hdq driver
>> - Enable 1-wire mode.
>> - Implement w1_triplet callback to facilitate search rom
>> procedure and auto detection of 1-wire slaves.
>> - P
From: Tuomas Tynkkynen
The Tegra124 cpufreq driver relies on certain clocks being present
in the /cpus/cpu@0 node.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
arch/arm/boot/dts/tegra124.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/
From: Tuomas Tynkkynen
Add basic platform driver support for the fast CPU cluster DFLL
clocksource found on Tegra124 SoCs. This small driver selects the
appropriate Tegra124-specific characterization data and integration
code. It relies on the DFLL common code to do most of the work.
Signed-off-
From: Tuomas Tynkkynen
The cpufreq driver for Tegra124 will be a different one than the old
Tegra20 cpufreq driver (tegra-cpufreq), which does not use the device
tree.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
.../bindings/cpufreq/tegra124-cpufreq.txt | 44 ++
Specify the CPU voltage regulator for the cpufreq driver.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
arch/arm/boot/dts/tegra124-jetson-tk1.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts
b/arch/arm/boot/dts/tegra12
From: Tuomas Tynkkynen
The Tegra124 will use a different driver for frequency scaling, so
rename the old driver (which handles only Tegra20) appropriately.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
drivers/cpufreq/Kconfig.arm| 6 +++---
dri
From: Tuomas Tynkkynen
The Tegra124 cpufreq driver depends on CONFIG_CPUFREQ_DT, so
enable it to get the Tegra driver to build by default.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
---
arch/arm/configs/tegra_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/ar
v9 of the Tegra124 cpufreq series. Changes:
- Dropped PLLX reordering patch since it is no longer needed
- Removed a couple of unused lines from the DFLL clocksource platform driver
- Made the cpufreq driver tristate and removed .owned = THIS_MODULE (as it's
not needed for
platform devices)
- M
This patch allows SoC-specific CAR initialization routines to register
their own reset_assert and reset_deassert callbacks with the common Tegra
CAR code. If defined, the common code will call these callbacks when a
reset control with number >= 0x4000 is attempted to be asserted or
deasserted r
From: Tuomas Tynkkynen
With closed loop support, the clock rate of the DFLL can be adjusted.
The oscillator itself in the DFLL is a free-running oscillator whose
rate is directly determined the supply voltage. However, the DFLL
module contains logic to compare the DFLL output rate to a fixed
ref
Jens Axboe writes:
> That would be better. But I'm still not sure we want to turn off
> accounting for discards. For the mixed write/discard cases it's
> definitely confusing. The better option would be to account it as a
> discard and not a write. Preferably in a way that would not break
> exist
On Wed, 2015-05-13 at 15:24 +0200, Michael Wang wrote:
> This is the following patch for:
> https://lkml.org/lkml/2015/5/5/417
> which try to document the settled rdma_cap_XX().
>
> Highlights:
> There could be many missing/mistakes/misunderstanding, please don't
> be hesitate to point out t
On 2015-05-12 17:51, Dave Chinner wrote:
On Tue, May 12, 2015 at 10:53:29AM -0400, Austin S Hemmelgarn wrote:
On 2015-05-12 10:36, J. Bruce Fields wrote:
On Tue, May 12, 2015 at 09:54:27AM -0400, John Stoffel wrote:
"Austin" == Austin S Hemmelgarn writes:
Austin> On 2015-05-12 01:08, Kevin
Hello Alexandre and Alessandro,
This is a trivial series that fixes module autoloading for the Maxim
MAX77686 and MAX77802 RTC drivers that didn't export their platform
device ID table with MODULE_DEVICE_TABLE() so modalias information
was not available.
The series is composed of the following pa
If the rtc-max77802 driver is built as a module, modalias information is
not filled so the module is not autoloaded. Use the MODULE_DEVICE_TABLE()
macro to export the platform ID table so the module contains that data.
Signed-off-by: Javier Martinez Canillas
---
drivers/rtc/rtc-max77802.c | 1 +
If the rtc-max77686 driver is built as a module, modalias information is
not filled so the module is not autoloaded. Use the MODULE_DEVICE_TABLE()
macro to export the platform ID table so the module contains that data.
Signed-off-by: Javier Martinez Canillas
---
drivers/rtc/rtc-max77686.c | 1 +
Functions inside kernel modules that use __ref
will end up being placed in .ARM.exidx.ref.text
section by gcc.
Currently we don't consider adding these functions
to arm unwind tables.
Hence, if we turn slub debug on by default we end up
with the messages of this sort:
unwind: Index not f
On Fri, May 01, 2015 at 12:01:07PM -0700, Jonathan Richardson wrote:
> The DTE creates timestamps of hardware based events such as GPIO, I2S
> signals for audio, etc. It was also intended to provide 802.1AS / PTP
> timestamps for network packets. The h/w has up to 32 "clients" -- the
> hardware inp
From: Tuomas Tynkkynen
Add a new cpufreq driver for Tegra124. Instead of using the PLLX as
the CPU clocksource, switch immediately to the DFLL. It allows the use
of higher clock rates, and will automatically scale the CPU voltage as
well. Besides the CPU clocksource switch, we let the cpufreq-dt
Herbert Xu wrote:
> > What if the fallback doesn't exist? For instance, a H/W contained key is
> > specifically limited to, say, just sign/verify and the not permitted to be
> > used for encrypt/decrypt. How do you provide a fallback given you can't get
> > at the key?
>
> That's a transform w
Hi
12.05.2015, 22:30, "Dmitry Khromov" :
> Some of 1-Wire devices commonly associated with physical access control
> systems are attached/generate presence for as short as 100 ms - hence
> the tens-to-hundreds milliseconds scan intervals are required.
>
> Signed-off-by: Dmitry Khromov
Greg, plea
There's a bug that perf report sometimes ignore some options on --stdio
output. This bug is triggered only if a related config variable is
set. For example, let's assume we have a following config file.
$ cat ~/.perfconfig
[call-graph]
print-type = graph
[hist]
percentage = absolut
From: Tuomas Tynkkynen
The DFLL clocksource is a separate IP block from the usual
clock-and-reset controller, so it gets its own device tree node.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
Acked-by: Michael Turquette
---
arch/arm/boot/dts/tegra124.dtsi | 25 +
On Tue, 12 May 2015 01:39:12 +1000
Alexey Kardashevskiy wrote:
> At the moment writing new TCE value to the IOMMU table fails with EBUSY
> if there is a valid entry already. However PAPR specification allows
> the guest to write new TCE value without clearing it first.
>
> Another problem this p
From: Tuomas Tynkkynen
The DFLL clocksource was missing from the list of possible parents for
the fast CPU cluster. Add it to the list.
Signed-off-by: Tuomas Tynkkynen
Signed-off-by: Mikko Perttunen
Acked-by: Michael Turquette
---
drivers/clk/tegra/clk-tegra-super-gen4.c | 4 +++-
1 file cha
From: Tuomas Tynkkynen
Add shared code to support the Tegra DFLL clocksource in open-loop
mode. This root clocksource is present on the Tegra124 SoCs. The
DFLL is the intended primary clock source for the fast CPU cluster.
This code is very closely based on a patch by Paul Walmsley from
December
On Wed, May 13, 2015 at 10:20:12AM -0400, Jens Axboe wrote:
> On 05/13/2015 09:10 AM, Jeff Moyer wrote:
> >Shaohua Li writes:
> >
> >>In a workload with discard request, the IO throughput is generally much
> >>higher than expected. This is quite confusing checking iostat. Discard
> >>request doesn
On Wed, May 13, 2015 at 09:06:26AM -0400, Josh Boyer wrote:
> Hi Miklos,
>
> Vincent reported[1] what appears to be a regression in Overlayfs with
> 4.0. This was found in the upstream docker community[2] on Ubuntu
> with 4.0.1 as well, so it is distro agnostic. The following sequence
> of comma
MT8173 DRM include one master drm device and three sub device: dsi device,
crtc main device, and ddp device.
Master drm device control the drm sub device and memory management.
dsi device is a drm connector/encoder device which control MIPI/DSI hw block.
crtc main is a drm crtc device which contro
From: Paul Walmsley
The DVCO present in the DFLL IP block has a separate reset line,
exposed via the CAR IP block. This reset line is asserted upon SoC
reset. Unless something (such as the DFLL driver) deasserts this
line, the DVCO will not oscillate, although reads and writes to the
DFLL IP bl
d int height,
+ unsigned int pitch, unsigned int format);
+
+void main_disp_path_power_on(void __iomem *ovl_base,
+ void __iomem *rdma_base, void __iomem *color_base,
+ void __iomem *ufoe_base, void __iomem *od_base);
+
+void mediatek_ovl_layer_switch(void __iomem *ovl_base,
+
This patch includes
1. Mediatek DRM Device binding
2. Mediatek DSI Device binding
3. Mediatek CRTC Main Device binding
4. Mediatek DDP Device binding
Signed-off-by: CK Hu
---
.../bindings/drm/mediatek/mediatek,crtc-main.txt | 38 ++
.../bindings/drm/mediatek/mediatek,ddp.tx
On 05/13/2015 11:00 AM, Jeff Moyer wrote:
Jens Axboe writes:
That would be better. But I'm still not sure we want to turn off
accounting for discards. For the mixed write/discard cases it's
definitely confusing. The better option would be to account it as a
discard and not a write. Preferably
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> From: Boris BREZILLON
>
> Add support for the AXP22x PMIC devices to the existing AXP20x driver.
> This includes the AXP221 and AXP223, which are identical except for
> the external data bus. Only AXP221 is added for now. AXP223 will be
> added after it
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> Add AXP221 to the list of supported devices.
>
> Also replace any mention of AXP20x in the document with a
> generic "PMIC".
>
> Signed-off-by: Chen-Yu Tsai
> Acked-by: Lee Jones
> ---
> Documentation/devicetree/bindings/mfd/axp20x.txt | 7 ---
>
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> From: Boris BREZILLON
>
> Add AXP22X regulator definitions and variant id associations.
> This introduces a new "switch" type output for one of the regulators.
> It is a switchable secondary output of one regulator, with the same
> voltage level as the
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> Add the list of regulators for AXP22x to the DT bindings.
> This includes the names and supply names.
>
> Signed-off-by: Chen-Yu Tsai
> ---
> Documentation/devicetree/bindings/mfd/axp20x.txt | 25
>
> 1 file changed, 25 insert
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> From: Boris BREZILLON
>
> Rework the AXP20X_ macros and probe function to support the several chip
> families, so that each family can define it's own set of regulators.
>
> Signed-off-by: Boris BREZILLON
> [w...@csie.org: Support different DC-DC work
On Fri, 10 Apr 2015, Chen-Yu Tsai wrote:
> Now that the axp20x-regulators driver supports different variants of the
> AXP family, we can enable regulator support for AXP22X without the risk
> of incorrectly configuring regulators.
>
> Signed-off-by: Chen-Yu Tsai
> Acked-by: Lee Jones
> ---
> d
On Wed, May 13, 2015 at 06:00:55PM +0300, Evgeniy Polyakov wrote:
> Hi
>
> 12.05.2015, 22:30, "Dmitry Khromov" :
> > Some of 1-Wire devices commonly associated with physical access control
> > systems are attached/generate presence for as short as 100 ms - hence
> > the tens-to-hundreds millisecon
On 13 May 2015 at 16:36, Mark Brown wrote:
> On Wed, May 13, 2015 at 02:51:02PM +0200, Maxime Ripard wrote:
>
>> I'd say we're also ok because if we delegate the device driving logic
>> to userspace, we should expect it to know what it does to first drive
>> the device properly, but also to open t
On 05/13/2015 11:22 AM, Shaohua Li wrote:
On Wed, May 13, 2015 at 10:20:12AM -0400, Jens Axboe wrote:
On 05/13/2015 09:10 AM, Jeff Moyer wrote:
Shaohua Li writes:
In a workload with discard request, the IO throughput is generally much
higher than expected. This is quite confusing checking io
Hello, Andrew.
On Tue, May 12, 2015 at 04:36:02PM -0700, Andrew Morton wrote:
> > printk recently added extended console support which can be selected
> > by setting CON_EXTENDED flag.
>
> There's no such thing as CON_EXTENDED. Not sure what this is trying to
> say.
Yeah, I ended up splitting t
On Wed, May 13, 2015 at 03:06:47PM +0200, Ulf Hansson wrote:
> On 13 May 2015 at 13:09, Mark Brown wrote:
> > Right, and this is probably going beyond the delays that the regulator
> > API is handling since it's not something the regulator hardware is
> > actively managing.
> Thanks for elaborat
On Wed, May 13, 2015 at 03:10:25PM +0300, Pantelis Antoniou wrote:
> Hi Greg,
>
> > On May 13, 2015, at 14:55 , Greg Kroah-Hartman
> > wrote:
> >
> > On Wed, May 13, 2015 at 10:59:41AM +0300, Pantelis Antoniou wrote:
> >> A cape loader based on DT overlays and DT objects.
> >>
> >> This is the
On Fri, May 08, 2015 at 01:02:17PM -0700, Jonathan Richardson wrote:
> For the clock functions I think we can use the existing framework
> unchanged with one exception: ptp_clock_adjtime() doesn't allow negative
> time adjustments and we would like to allow this.
???
/**
* struct ptp_clock_info
Running a test on a large CPU count box with xfs, I hit a live lock
with the following backtraces on several CPUs:
Call Trace:
[] __const_udelay+0x28/0x30
[] xfs_icsb_lock_cntr+0x2a/0x40 [xfs]
[] xfs_icsb_modify_counters+0x71/0x280 [xfs]
[] xfs_trans_reserve+0x171/0x210 [
Currently we use per-cpu array to hold pointers to preallocated nodes.
Let's replace it with linked list. On x86_64 it saves 256 bytes in
per-cpu ELF section which may translate into freeing up 2MB of memory
for NR_CPUS==8192.
Signed-off-by: Kirill A. Shutemov
---
lib/radix-tree.c | 27 +
On Wed, May 13, 2015 at 12:26:04PM +0100, Mark Brown wrote:
> On Tue, May 12, 2015 at 10:33:24PM +0200, Maxime Ripard wrote:
>
> > While this is nicer than the DT solution because of its accurate hardware
> > representation, it's still not perfect because you might not have access to
> > the
> >
On 05/13/2015 08:58 AM, Luiz Capitulino wrote:
> On Tue, 12 May 2015 19:17:24 -0400
> Sasha Levin wrote:
>
>> > Hi all,
>> >
>> > I'm seeing odd jump in time values during boot of a KVM guest:
>> >
>> > [...]
>> > [0.00] tsc: Detected 2260.998 MHz processor
>> > [3376355.247558] Calibra
Hi Mark,
Enjoy!
The following changes since commit 5ebe6afaf0057ac3eaeb98defd5456894b446d22:
Linux 4.1-rc2 (2015-05-03 19:22:23 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git
tags/ib-mfd-regulator-v4.2
for you to fetch changes up
On 05/13/2015 05:22 AM, Masami Hiramatsu wrote:
> On 2015/05/12 21:48, William Cohen wrote:
>> Hi Dave,
>>
>> In some of the previous diagnostic output it looked like things would go
>> wrong
>> in the entry.S when the D bit was cleared and the debug interrupts were
>> unmasksed. I wonder if so
On Wed, 29 Apr 2015, Lee Jones wrote:
> On Wed, 29 Apr 2015, Johan Hovold wrote:
>
> > On Tue, Apr 14, 2015 at 03:04:06PM +0200, Johan Hovold wrote:
> > > Hi Mark and Lee,
> > >
> > > On Thu, Mar 26, 2015 at 08:32:09AM +, Lee Jones wrote:
> > > > On Wed, 25 Mar 2015, Johan Hovold wrote:
> >
On Wed, May 13, 2015 at 4:58 AM, Linus Walleij wrote:
> On Wed, May 13, 2015 at 4:25 AM, Feng Kan wrote:
>
>> Marc:
>>
>> Sorry for top posting. It seems with GIC-400, the get_irqstate is not a
>> reliable
>> way of accessing the GPIO status. In our case, the gpio interrupt status can
>> only be
On Wednesday 13 May 2015 16:20:34 Daniel Thompson wrote:
> For the all reset bits:
>
>clock idx = reset idx + 256
>
> The opposite is not true; the clock bits are a superset of the reset
> bits (the reset bits act on cells but some cells have >1 clock).
Ok, in that case, I would strongly re
Hello, David.
On Tue, May 12, 2015 at 07:23:22PM -0400, David Miller wrote:
> Second question, is there an upper bound on this header size?
> Because if there is, it seems to me that there is no reason why we
> can't just avoid the fragmentation support altogether.
>
> The current code limits to 1
On Wed, May 13, 2015 at 1:27 PM, Lee Jones wrote:
> On Tue, 12 May 2015, Jassi Brar wrote:
>> On Wed, May 6, 2015 at 1:57 AM, Eric Anholt wrote:
>> > From: Lubomir Rintel
>> >
>> > This patch was split out of Lubomir's original mailbox patch by Eric
>> > Anholt, and the required properties docum
Jens Axboe writes:
> On 05/13/2015 11:00 AM, Jeff Moyer wrote:
>> Jens Axboe writes:
>>
>>> That would be better. But I'm still not sure we want to turn off
>>> accounting for discards. For the mixed write/discard cases it's
>>> definitely confusing. The better option would be to account it as a
There is a complimentary flag called SET_BRIGHTNESS_ASYNC.
Having both is redundant. This patch removes the unneeded flag
without any functionality change.
CC: Bryan Wu
CC: Richard Purdie
CC: linux-l...@vger.kernel.org
CC: linux-kernel@vger.kernel.org
Signed-off-by: Stas Sergeev
---
drivers/
Hi Greg,
> On May 13, 2015, at 18:36 , Greg Kroah-Hartman
> wrote:
>
> On Wed, May 13, 2015 at 03:10:25PM +0300, Pantelis Antoniou wrote:
>> Hi Greg,
>>
>>> On May 13, 2015, at 14:55 , Greg Kroah-Hartman
>>> wrote:
>>>
>>> On Wed, May 13, 2015 at 10:59:41AM +0300, Pantelis Antoniou wrote:
>
On 13 May 2015 at 17:37, Greg Kroah-Hartman wrote:
> On Wed, May 13, 2015 at 12:26:04PM +0100, Mark Brown wrote:
>> On Tue, May 12, 2015 at 10:33:24PM +0200, Maxime Ripard wrote:
>>
>> > While this is nicer than the DT solution because of its accurate hardware
>> > representation, it's still not p
I am just noticed a hang on my largest box.
I can only reproduce with large core counts, if I turn down the number
of cpus it doesn't have an issue.
Also as time goes on the amount of time required to initialize pages
goes up.
log_uv48_05121052:[ 177.250385] node 0 initialised, 14950072 pa
The use of ifneq against 'n' to conditionally compile codec-specific
parts is wrong and was resulting in all the codec tables being built
even for deselected codecs.
Signed-off-by: Richard Fitzgerald
Acked-by: Lee Jones
---
drivers/mfd/Makefile |6 +++---
1 files changed, 3 insertions(+), 3
For the WM5102 there is a dependency in the core code on wm5102_patch()
which only exists when CONFIG_MFD_WM5102 is defined. To avoid having
to sprinkle #ifdefs around the code it is given an alternative empty
stub version when CONFIG_MFD_WM5102 is deselected
Signed-off-by: Richard Fitzgerald
Ack
On Wed, May 13, 2015 at 03:24:32PM +0200, Michael Wang wrote:
> This is the following patch for:
> https://lkml.org/lkml/2015/5/5/417
> which try to document the settled rdma_cap_XX().
>
> Highlights:
> There could be many missing/mistakes/misunderstanding, please don't
> be hesitate to poin
On Wed, May 13, 2015 at 2:17 AM, Maxime Ripard
wrote:
> Hi Dan,
>
> On Tue, May 12, 2015 at 09:05:41AM -0700, Dan Williams wrote:
>> On Tue, May 12, 2015 at 8:37 AM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> > This serie refactors the mv_xor in order to support the latest Armada
>> > 38x features,
Commit ab760a0 (ntb: Adding split BAR support for Haswell platforms)
changed ntb_device's mw from a fixed-size array into a pointer that is
allocated based on limits.max_mw; however, on Atom platforms, max_mw
is not initialized until ntb_device_setup(), which happens after the
allocation.
Fill out
Hi,
On 13 May 2015 at 16:23, CK Hu wrote:
> + /*
> +* copy the mode data adjusted by mode_fixup() into crtc->mode
> +* so that hardware can be seet to proper mode.
> +*/
> + memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
Please do not do this. adj
On Wed, May 13, 2015 at 2:52 AM, Borislav Petkov wrote:
>
> Now we CALL _copy_*_user which does CALL the optimal alternative
> version. Advantage is that we're saving some space and alternatives
> application for copy_user* is being done in less places, i.e.
> arch/x86/lib/uaccess_64.c. If I move
On Wed, May 13, 2015 at 06:14:30AM +0100, Vaneet Narang wrote:
> EP-2DAD0AFA905A4ACB804C4F82A001242F
Ok, I have to ask: what on Earth is this number and what does [EDT] mean?
> >On Tue, May 12, 2015 at 02:12:54PM +0100, Vaneet Narang wrote:
> >> On Tue, May 12, 2015 at 12:48:13PM +0100, Maninder
Em Thu, May 14, 2015 at 12:03:26AM +0900, Namhyung Kim escreveu:
> There's a bug that perf report sometimes ignore some options on --stdio
> output. This bug is triggered only if a related config variable is
> set. For example, let's assume we have a following config file.
Testing, please next t
trace_mm_page_pcpu_drain, trace_kmem_cache_free, trace_mm_page_free
and trace_tlb_flush can be potentially called from an offlined cpu.
Since trace points use RCU and RCU should not be used from offlined
cpus, we have checks to filter out such calls. Add comments to explain
this.
Signed-off-by: Sh
On Wed, May 13, 2015 at 04:43:33PM +0100, Lee Jones wrote:
> On Wed, 29 Apr 2015, Lee Jones wrote:
> > I'm in the same situation -- can't do anything without an Ack from Mark.
> I happen to know that Mark regularly deletes his mail.
> Can you re-sent this complete with collected Acks please?
If
On Wed, May 13, 2015 at 06:24:06AM +0100, Maninder Singh wrote:
> EP-2DAD0AFA905A4ACB804C4F82A001242F
>
> Subject: [PATCH 1/1] hw_breakpoint.c :cpu hotplug handling
>
> This patch adds support for CPU hotplug, It re-installl all installed
> watchpoints and breakpoints
> back on H/W in case of cp
In order to avoid an endless recursion, functions that may get
called from the data access handler must not call into tracing
functions, which may cause data access faults ;-)
Advancing from my previous approach that lavishly compiled whole
subdirs without the profiling switches, this is more fine
In certain circumstances it may not be possible to schedule particular
events due to constraints other than a lack of hardware counters (e.g.
on big.LITTLE systems where CPUs support different events). The core
perf event code does not distinguish these cases and pessimistically
assumes that any fa
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