[PATCH v8 17/21] clocksource / arch_timer: Parse GTDT to initialize arch timer

Using the information presented by GTDT (Generic Timer Description Table) to initialize the arch timer (not memory-mapped). CC: Daniel Lezcano Originally-by: Amit Daniel Kachhap Tested-by: Suravee Suthikulpanit Tested-by: Yijing Wang Tested-by: Mark Langsdorf Tested-by: Jon Masters Tested-by

[PATCH v8 08/21] dt / chosen: Add linux,uefi-stub-generated-dtb property

When system supporting both DT and ACPI but firmware providing no dtb, we can use this linux,uefi-stub-generated-dtb property to let kernel know that we can try ACPI configuration data even if no "acpi=force" is passed in early parameters. CC: Mark Rutland CC: Jonathan Corbet CC: Catalin Marinas

[PATCH v8 11/21] ARM64 / ACPI: Get PSCI flags in FADT for PSCI init

From: Graeme Gregory There are two flags: PSCI_COMPLIANT and PSCI_USE_HVC. When set, the former signals to the OS that the firmware is PSCI compliant. The latter selects the appropriate conduit for PSCI calls by toggling between Hypervisor Calls (HVC) and Secure Monitor Calls (SMC). FADT table c

[PATCH v8 13/21] ARM64 / ACPI: Parse MADT for SMP initialization

MADT contains the information for MPIDR which is essential for SMP initialization, parse the GIC cpu interface structures to get the MPIDR value and map it to cpu_logical_map(), and add enabled cpu with valid MPIDR into cpu_possible_map. ACPI 5.1 only has two explicit methods to boot up SMP, PSCI

[PATCH v8 10/21] ARM64 / ACPI: If we chose to boot from acpi then disable FDT

From: Graeme Gregory If the early boot methods of acpi are happy that we have valid ACPI tables and acpi=force has been passed, then do not unflat devicetree effectively disabling further hardware probing from DT. CC: Catalin Marinas CC: Will Deacon Tested-by: Suravee Suthikulpanit Tested-by:

[PATCH v8 06/21] ARM64 / ACPI: Introduce PCI stub functions for ACPI

CONFIG_ACPI depends CONFIG_PCI on x86 and ia64, in ARM64 server world we will have PCIe in most cases, but some of them may not, make CONFIG_ACPI depend CONFIG_PCI on ARM64 will satisfy both. With that case, we need some arch dependent PCI functions to access the config space before the PCI root b

[PATCH v8 05/21] ACPI / sleep: Introduce sleep_arm.c

From: Graeme Gregory ACPI 5.1 does not currently support S states for ARM64 hardware but ACPI code will call acpi_target_system_state() for device power managment, so introduce sleep_arm.c to allow other drivers to function until S states are defined. CC: Rafael J. Wysocki Tested-by: Suravee Su

[PATCH v8 01/21] acpi: add arm64 to the platforms that use ioremap

From: Graeme Gregory Now with the base changes to the arm memory mapping it is safe to convert to using ioremap to map in the tables after acpi_gbl_permanent_mmap is set. CC: Rafael J Wysocki Signed-off-by: Al Stone Signed-off-by: Graeme Gregory Signed-off-by: Hanjun Guo --- drivers/acpi/os

Re: [RFC PATCH v3 2/3] mm/page_alloc: factor out fallback freepage checking

Hello Joonsoo, At 2015/2/2 15:15, Joonsoo Kim wrote: > This is preparation step to use page allocator's anti fragmentation logic > in compaction. This patch just separates fallback freepage checking part > from fallback freepage management part. Therefore, there is no functional > change. > > Sig

Re: [PATCHv2 05/19] ia64: expose number of page table levels on Kconfig level

On Sat, 2015-01-31 at 02:17 +0200, Kirill A. Shutemov wrote: > We would want to use number of page table level to define mm_struct. > Let's expose it as CONFIG_PGTABLE_LEVELS. > > We need to define PGTABLE_LEVELS before sourcing init/Kconfig: > arch/Kconfig will define default value and it's sourc

Re: [PATCH v2 1/3] lib: find_*_bit reimplementation

On Mon, Feb 02 2015, "George Spelvin" wrote: > Rasmus Villemoes wrote: >> ... and this be part of _find_next_bit? Can find_next_bit not be simply >> 'return _find_next_bit(addr, size, offset, 1);', and similarly for >> find_next_zero_bit? Btw., passing true and false for the boolean >> parameter

RE: [PATCH 1/2] infiniband: Help gcc generate better code for ocrdma_srq_toggle_bit

Thank you Yann Droneaud for forwarding this mail. We will add an entry for ocrdma driver in MAINTAINERS file. Thanks, Selvin Xavier > -Original Message- > From: Yann Droneaud [mailto:ydrone...@opteya.com] > Sent: Saturday, January 31, 2015 4:38 PM > To: Rasmus Villemoes > Cc: Roland Dre

Re: [PATCH 8/8] phy: add driver for TI TUSB1210 ULPI PHY

> > > > You can't really compare a bus like i2c, which can't enumerate devices > > > > natively, to ULPI which can. > > > > > > why not ? The BIOS might not need to use the PHY (or USB) at all, it can > > > very well decide to never turn it on, right ? > > > > If ULPI was seen as a bus, then no.

[PATCH v4 01/13] clk: samsung: exynos5433: Add binding document for Exynos5433 clock domains

This patch adds devicetree binding document for Exynos5433 SoC system clock controller. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 258 + 1 file changed, 258 insertions(+)

[PATCH v4 07/13] clk: samsung: exynos5433: Add clocks for CMU_MIF domain

This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect). The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi A

[PATCH v4 08/13] clk: samsung: exynos5433: Add clocks for CMU_DISP domain

This patch adds the the mux/divider/gate clocks for CMU_DISP domain which includes the clocks of Display IPs (DECON/HDMI/DSIM/MIXER). The CMU_DISP clocks is used to need the source clock of CMU_MIF domain so, the CMU_MIF's clocks related to CMU_DISP should be always on state. Also, CMU_DISP must n

[PATCH v4 09/13] clk: samsung: exynos5433: Add clocks for CMU_AUD domain

This patch adds the mux/divider/gate clocks for CMU_AUD domain which includes the clocks of Cortex-A5/Bus/Audio clocks. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 172 + inc

[PATCH v4 03/13] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain

This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433. CMU_TOP domain provides source clocks to other CMU domains. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae Reviewed-by: Pankaj Dubey --- drivers/clk/samsung/clk-exynos5433.c

[PATCH v4 13/13] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain

This patch adds the divider/gate of CMU_GSCL domain which contains gscaler clocks. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 146 + include/dt-bindings/clock/exynos5433.h |

[PATCH v4 04/13] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain

This patch adds missing divider/gate clocks of CMU_PERIC domain which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use external input clock which has 'ioclk_*' prefix. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi [ideal.song: Change clk flags of to pclk_gpio_* c

[PATCH v4 12/13] clk: samsung: exynos5433: Add clocks for CMU_G3D domain

This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains the clocks for GPU(3D Graphics Engine). Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae Reviewed-by: Pankaj Dubey --- drivers/clk/samsung/clk-exynos5433.c | 127 +

Re: [PATCH 06/20] staging/lustre: fix comparison between signed and unsigned

On Sun, Feb 01, 2015 at 09:52:05PM -0500, gr...@linuxhacker.ru wrote: > From: Dmitry Eremin > > Expression if (size != (ssize_t)size) is always false. > Therefore no bounds check errors detected. The original code actually worked as designed. The integer overflow could only happen on 32 bit sys

Re: [PATCH v2 01/12] drm: bridge/dw_hdmi: adjust n/cts setting order

On 01/31/2015 06:07 AM, Russell King - ARM Linux wrote: On Fri, Jan 30, 2015 at 06:25:30AM -0500, Yakir Yang wrote: For Designerware HDMI, the following write sequence is recommended: 1. aud_n3 (set bit ncts_atomic_write if desired) 2. aud_cts3 (set CTS_manual and CTS value if desired/enabled)

Re: [PATCH] fbdev: geocode: remove unneeded NULL check

Tomi Valkeinen wrote: > On 06/01/15 14:45, Sudip Mukherjee wrote: >> the check for info is not required as we are checking it immediately >> after gxfb_init_fbinfo() and lxfb_init_fbinfo() and returnig -ENOMEM >> if it is NULL. >> >> Signed-off-by: Sudip Mukherjee >> --- >> Hi Tomi, >> This patc

[PATCH v4 00/13] clk: samsung: Add the support for exynos5433 clocks

This patchset adds the support for Exynos5433 CMU (Clock Management Unit) by using common clock framework. This patchset is divided from patch[1] and then sent it. [1] https://lkml.org/lkml/2014/12/2/134 Changelog: Changes from v3: - Use 'oscclk' clock name instead of 'fin_pll' - Add the clock de

[PATCH v4 11/13] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain

This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 302 + in

Re: [PATCH V2] acpi:apd:add AMD ACPI2Platform device support for x86 system.

On Mon, Feb 02, 2015 at 05:50:52PM +0800, Ken Xue wrote: > >From b9654ecbfaebde00aee746a024eec9fe8de24b97 Mon Sep 17 00:00:00 2001 > From: Ken Xue > Date: Mon, 2 Feb 2015 17:32:24 +0800 > Subject: [PATCH] This new feature is to interpret AMD specific ACPI device to > platform device such as I2C,

Re: Can this be a invalid memory access? (was: Re: [PATCH] spi/xilinx: Cast ioread32/iowrite32 function pointers)

Hi Ricardo, On Mon, Feb 2, 2015 at 1:49 PM, Ricardo Ribalda Delgado wrote: > Regarding ioread8 et al. > > On include/asm-generic/io.h is defined as: > extern unsigned int ioread8(void __iomem *); > > On include/asm-generic/io.h: > static inline u8 ioread8(const volatile void __iomem *addr) > > Pl

Re: [PATCH v2 0/12] Those patches is used for dw_hdmi audio support

On 01/31/2015 07:00 AM, Russell King - ARM Linux wrote: On Fri, Jan 30, 2015 at 06:23:51AM -0500, Yakir Yang wrote: We found Designware hdmi driver only support audio clock config, we can not play sound through it. To add Designware HDMI Audio support, we make those patch set: 1): modify n/c

[PATCH v4 02/13] clk: samsung: exynos5433: Add clocks using common clock framework

This patch adds the support for CMU (Clock Management Units) of Exynos5433 which is 64bit SoC and has Octa-cores. This patch supports necessary clocks (PLL/MMC/UART/MCT/I2C/SPI) for kernel boot and includes binding documentation for Exynos5433 clock controller. Cc: Sylwester Nawrocki Cc: Tomasz F

[PATCH v4 05/13] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain

This patch adds missing gate clocks of CMU_PERIS domain which includes TMU/TZPC/SECKEY/CHIPID/TOPRTC/EFUSE IPs. The special clocks of CMU_PERIS use fin_pll source clock directly. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae Reviewed-by: Pankaj Dubey --

[PATCH v4 06/13] clk: samsung: exynos5433: Add clocks for CMU_G2D domain

This patch adds ths mux/divider/gate clocks of CMU_G2D domain which includes G2D/MDMA IPs. The CMU_G2D must need the clocks related to G2D by providing CMU_TOP domain. So, this patch add several clocks for G2D from CMU_TOP domain. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Cho

[PATCH v4 10/13] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains

This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains which contain global data buses clocked at up the 400MHz. These blocks transfer data between DRAM and various sub-blocks. These clock domains also contain global peripheral buses clocked at 67/111/200/222/266/333/400 MHz and use

Re: [PATCH v2 08/12] drm: bridge/dw_hdmi: add audio config interfaces

On Mon, Feb 02, 2015 at 07:32:05AM -0500, Yang Kuankuan wrote: > On 02/02/2015 06:53 AM, Russell King - ARM Linux wrote: > >On Mon, Feb 02, 2015 at 12:02:50PM +0800, Daniel Kurtz wrote: > >>Hi ykk, > >> > >>On Sat, Jan 31, 2015 at 10:34 PM, Yang Kuankuan wrote: > >>>On 01/31/2015 06:48 AM, Russell

[PATCH v2 0/9] clk: samsung: Add clocks for remaining domains of Exynos5433

This patchset adds the support for following clock domains of Exynos5433 and clkout drvier. Following clock domains has clocks for each IP. - CMU_APOLLO : clocks for Cortex-A53 Quad-core processor. - CMU_ATLAS : clocks for Cortex-A57 Quad-core processor, CoreSight and L2 cache cont

[PATCH v2 3/9] clk: samsung: exynos5433: Add clocks for CMU_MSCL domain

This patch adds the mux/divider/gate clocks for CMU_MSCL domain which generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 15 ++ driver

[PATCH v2 6/9] clk: samsung: exynos5433: Add clocks for CMU_ISP domain

This patch adds the mux/divider/gate clocks for CMU_ISP domain which generates the clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 15 ++ drivers/clk/sams

[PATCH v2 5/9] clk: samsung: exynos5433: Add clocks for CMU_HEVC domain

This patch adds the mux/divider/gate clocks for CMU_HEVC domain which generates the clocks for HEVC(High Efficiency Video Codec) decoder IP. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 11 ++ d

[PATCH v2 7/9] clk: samsung: exynos5433: Add clocks for CMU_CAM0 domain

This patch adds the mux/divider/gate clocks for CMU_HEVC domain which generates the clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 18

[PATCH v2 8/9] clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain

This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 23 ++ d

[PATCH v2 2/9] clk: samsung: exynos5433: Add clocks for CMU_ATLAS domain

This patch adds the mux/divider/gate clocks for CMU_ATLAS domain which generates the clocks for Cortex-A57 Quad-core processsor, L2 cache controller and CoreSight. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos543

[PATCH v2 4/9] clk: samsung: exynos5433: Add clocks for CMU_MFC domain

This patch adds the mux/divider/gate clocks for CMU_MFC domain which generates the clocks for MFC(Multi-Format Codec) IP. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 11 ++ drivers/clk/samsung/

[PATCH v2 9/9] clk: samsung: Add CLKOUT driver support for Exynos5433 SoC.

From: Inha Song This patch add CLKOUT driver support for Exynos5433 SoC. Signed-off-by: Inha Song Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos-clkout.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clko

[PATCH v2 1/9] clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain

This patch adds the mux/divider/gate clocks for CMU_APOLLO domain which generates the clocks for Cortex-A53 Quad-core processsor. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- .../devicetree/bindings/clock/exynos5433-clock.txt | 11 ++ drivers/clk/

sequential I/O on SSD disk varies from 20 to 300 MBytes/s every week

Hello, I have an extremely odd situation when the I/O speed changes for both SATA and SSD disks every few days or weeks with no apparent reason. The servers have clean base install with nothing but SSH running and the test I am doing is the following: # dd if=/dev/zero of=/dev/sda4 bs=1M co

Re: cleanup and refactor BLOCK_PC mapping helpers V2

On Sun, Jan 25, 2015 at 06:29:11PM +0800, Ming Lei wrote: > Looks all are nice cleanup: > > Reviewed-by: Ming Lei > > Also patches passed xfstests(check -g auto) against v3.19-rc4_next-20150115. Jens, do these patches look fine to you? Any chance to get them into the tree for the 3.20 merge wind

Re: Linux 3.19-rc5

On Sat, Jan 31, 2015 at 01:54:36PM -0800, Linus Torvalds wrote: > On Sat, Jan 31, 2015 at 12:16 PM, Peter Zijlstra wrote: > > > > All the stuff it flagged are genuinely wrong, albeit not disastrously > > so, things mostly just work. > > I really disagree. > > They weren't wrong. They *could* occ

How to fix CDROM/DVD eject mess?

Hi, we've got a bug report about the mishandling of DVD/CDROM media eject button, and it seems indeed broken since some time ago. In short: when the eject button is pressed, the media is forcibly ejected no matter whether it's mounted or in use. And, the mount remains even after ejecting the med

Re: [PATCH] staging: media: vino: vino: Removed variables that is never used

On 01/28/2015 11:47 PM, Rickard Strandqvist wrote: > Variable ar assigned a value that is never used. > I have also removed all the code that thereby serves no purpose. > > This was found using a static code analysis program called cppcheck FYI: I've dropped this patch since the vino driver will

Re: [RFC PATCH v3 3/3] mm/compaction: enhance compaction finish condition

2015-02-02 19:20 GMT+09:00 Vlastimil Babka : > On 02/02/2015 08:15 AM, Joonsoo Kim wrote: >> Compaction has anti fragmentation algorithm. It is that freepage >> should be more than pageblock order to finish the compaction if we don't >> find any freepage in requested migratetype buddy list. This is

Re: [RFC PATCH v3 2/3] mm/page_alloc: factor out fallback freepage checking

2015-02-02 18:59 GMT+09:00 Vlastimil Babka : > On 02/02/2015 08:15 AM, Joonsoo Kim wrote: >> This is preparation step to use page allocator's anti fragmentation logic >> in compaction. This patch just separates fallback freepage checking part >> from fallback freepage management part. Therefore, th

Re: [RFC PATCH v3 2/3] mm/page_alloc: factor out fallback freepage checking

2015-02-02 21:56 GMT+09:00 Zhang Yanfei : > Hello Joonsoo, > > At 2015/2/2 15:15, Joonsoo Kim wrote: >> This is preparation step to use page allocator's anti fragmentation logic >> in compaction. This patch just separates fallback freepage checking part >> from fallback freepage management part. Th

adjtimex EINVALs in 3.18.5 (and 3.19)

Hi Sasha and John, As we rolled out 3.18.5 in Fedora, we've had a number of people complain about chrony no longer working when they reboot. It seems the calls to adjtimex chrony is making are failing, and then it fails to start. Looking at the changelog, I see "time: adjtimex: Validate the ADJ_

[PATCH] clk: fractional-divider: support for divider bypassing

If the divider or multiplier values values are 0 in the register, bypassing the divider and returning the parent clock rate in clk_fd_recalc_rate(). Signed-off-by: Heikki Krogerus --- drivers/clk/clk-fractional-divider.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/clk-frac

[PATCH] staging: lustre: osc: Fix sparse warning about osc_init

When running sparse on the osc/ subdirectory, it shows the following warning: andreas@workbox:~/linux-next$ make C=1 M=drivers/staging/lustre/lustre/osc/ [...] drivers/staging/lustre/lustre/osc/osc_request.c:3335:12: warning: symbol 'osc_init' was not declared. Should it be static? [...] As this

Re: N900 v3.19-rc5 arm atags_to_fdt.c is broken

On Tue 2015-01-27 10:16:24, Nicolas Pitre wrote: > On Tue, 27 Jan 2015, Pavel Machek wrote: > > > > > > > > I would say, problem is because omap3-n900 binary DT is too large > > > > > > I agree. > > > > > > > OK if that's the case, then your patch makes sense to me. It also > > > > seems we can

Re: [PATCH v8 08/21] dt / chosen: Add linux,uefi-stub-generated-dtb property

On Mon, Feb 02, 2015 at 08:45:36PM +0800, Hanjun Guo wrote: > When system supporting both DT and ACPI but firmware providing > no dtb, we can use this linux,uefi-stub-generated-dtb property > to let kernel know that we can try ACPI configuration data even > if no "acpi=force" is passed in early par

Re: [nfs] WARNING: CPU: 1 PID: 1392 at kernel/sched/core.c:7300 __might_sleep+0xbd/0xd0()

On Mon, Feb 2, 2015 at 2:33 AM, Christoph Hellwig wrote: > > On Sat, Jan 31, 2015 at 07:19:17PM -0800, Fengguang Wu wrote: > > Hi Christoph, > > > > FYI, this patch discloses an 100% reproducible boot warning. > > > > git://git.infradead.org/users/hch/pnfs.git flexfiles+pnfsd > > commit 34c311faa8

[PATCH] MAINTAINERS: remove SUPERH website

the mentioned website only displays information about buy and sell domains. Signed-off-by: Sudip Mukherjee --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 7cddca0..1329c22 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9314,7 +9314,6 @@ F:

Re: [PATCH 2/2] coresight: Adding coresight support to arm64

On Fri, Jan 30, 2015 at 10:54:26PM +, mathieu.poir...@linaro.org wrote: > From: Mathieu Poirier > > Aside from tracers, all currently supported coresight IP blocks > are 64 bit ready. As such add the required symbol definition to > compile the framework and drivers. > > Also fixing a couple

Re: sequential I/O on SSD disk varies from 20 to 300 MBytes/s every week

Hi, I have an extremely odd situation when the I/O speed changes for both SATA and SSD disks every few days or weeks with no apparent reason. The servers have clean base install with nothing but SSH running and the test I am doing is the following: # dd if=/dev/zero of=/dev/sda4 bs=1M count=1024

Re: [PATCH 1/2] arm64: adding cpu lookup functionality

On Fri, Jan 30, 2015 at 10:54:25PM +, mathieu.poir...@linaro.org wrote: > From: Mathieu Poirier > > Adding a lookup function allowing for quick and easy mapping > between processor HWID (as found, for example) in DT specifications > and the CPU index known to the kernel. > > Signed-off-by: M

Re: Reading /sys with side effects (was Re: [PATCH 1/2] Documentation: leds: Add description of LED Flash class extension)

Hi! > >[Actually, you could _always_ do two reads on those devices, discard > >first result, and return the second. But I'm not sure how hardware > >will like that.] > > This would be the most sensible option. > > > However, let's analyze the typical use cases for flash strobing: > > > --

Re: [BUG]rmmod null_blk lead to general protection fault on 3.19.0-rc6

Hi Jens, I found 2 patches commits (74170118b & e09aae7e)from https://git.kernel.org/cgit/linux/kernel/git/axboe/linux-block.git/log/?h=for-linus After apply those 2 patches, the bug was fixed. Is it possible to include those 2 patches in official 3.19.0? On Mon, Feb 2, 2015 at 12:11 PM, Jinpu

Re: [PATCH v8 08/21] dt / chosen: Add linux,uefi-stub-generated-dtb property

On Mon, Feb 02, 2015 at 01:40:33PM +, Leif Lindholm wrote: > On Mon, Feb 02, 2015 at 08:45:36PM +0800, Hanjun Guo wrote: > > When system supporting both DT and ACPI but firmware providing > > no dtb, we can use this linux,uefi-stub-generated-dtb property > > to let kernel know that we can try A

Re: [RFC PATCH v3 3/3] mm/compaction: enhance compaction finish condition

Hello, At 2015/2/2 18:20, Vlastimil Babka wrote: > On 02/02/2015 08:15 AM, Joonsoo Kim wrote: >> Compaction has anti fragmentation algorithm. It is that freepage >> should be more than pageblock order to finish the compaction if we don't >> find any freepage in requested migratetype buddy list. Th

Re: [PATCHv2 05/19] ia64: expose number of page table levels on Kconfig level

On Mon, Feb 02, 2015 at 01:56:39PM +0100, Paul Bolle wrote: > On Sat, 2015-01-31 at 02:17 +0200, Kirill A. Shutemov wrote: > > We would want to use number of page table level to define mm_struct. > > Let's expose it as CONFIG_PGTABLE_LEVELS. > > > > We need to define PGTABLE_LEVELS before sourcing

[GIT PULL] GPIO fixes for v3.19 last take

Hi Linus, there is a high bug-spot activity in GPIO this merge window, much due to Johan Hovolds spearheading into actually exercising the removal path for GPIO chips, something that was never really exercised before. The other two fixes are augmenting erroneous behaviours in two specific drivers

Re: [PATCH v4 01/13] clk: samsung: exynos5433: Add binding document for Exynos5433 clock domains

Hi Chanwoo, On 02/02/15 14:01, Chanwoo Choi wrote: > This patch adds devicetree binding document for Exynos5433 SoC system clock > controller. > > Cc: Sylwester Nawrocki > Cc: Tomasz Figa > Signed-off-by: Chanwoo Choi > Acked-by: Inki Dae > --- > .../devicetree/bindings/clock/exynos5433-cloc

Re: N900 v3.19-rc5 arm atags_to_fdt.c is broken

On Mon, 2 Feb 2015, Pavel Machek wrote: > On Tue 2015-01-27 10:16:24, Nicolas Pitre wrote: > > On Tue, 27 Jan 2015, Pavel Machek wrote: > > > > > > > > > > > I would say, problem is because omap3-n900 binary DT is too large > > > > > > > > I agree. > > > > > > > > > OK if that's the case, then

Re: Another SCHED_DEADLINE bug (with bisection and possible fix)

Hi Peter, On 01/31/2015 10:56 AM, Peter Zijlstra wrote: On Fri, Jan 30, 2015 at 10:35:02AM +, Juri Lelli wrote: So, we do the safe thing only in case of throttling. No, even for the !throttle aka running tasks. We only use dl_{runtime,deadline,period} for replenishment, until that time we

[PATCH] i915: stack address leak when failing to read registers.

It is possible for the *_read*() functions to fail, in which case it'll leave its third argument untouched. Most of the code do not check the return value of *_read*() functions, and will happily use garbage from the stack to test various things. For example, ch7xxx_dump_regs() will leak 1 byte f

Re: [PATCH 3/3] clk: remove clk-private.h

Hi Mike, On Fri, Jan 30, 2015 at 10:25 PM, Michael Turquette wrote: > Private clock framework data structures should be private, surprisingly. > > Now that all platforms and drivers have been updated to remove static > initializations of struct clk and struct clk_core objects and all > references

Re: [RFC][PATCH v2] procfs: Always expose /proc//map_files/ and make it readable

On 2015-01-30 20:58, Calvin Owens wrote: On Thursday 01/29 at 17:30 -0800, Kees Cook wrote: On Tue, Jan 27, 2015 at 8:38 PM, Calvin Owens wrote: On Monday 01/26 at 15:43 -0800, Andrew Morton wrote: On Tue, 27 Jan 2015 00:00:54 +0300 Cyrill Gorcunov wrote: On Mon, Jan 26, 2015 at 02:47:31PM

Re: [PATCH] pci-dma: Fix x86 dma_alloc_coherent to fully clear all pages returned

On 01/30/2015, 10:54 PM, Tim Chen wrote: > On Sat, 2015-01-31 at 00:03 +0300, Sergei Shtylyov wrote: >> On 01/30/2015 10:54 PM, Tim Chen wrote: > >>> >>> return NULL; >>> } >>> + /* round up to full page size */ >>> + size = (((size-1) >> PAGE_SHIFT) + 1) * PAGE_SIZE; >> >>

Re: Can this be a invalid memory access? (was: Re: [PATCH] spi/xilinx: Cast ioread32/iowrite32 function pointers)

Hello Geert On Mon, Feb 2, 2015 at 2:04 PM, Geert Uytterhoeven wrote: >> void * pvar=varB; > > ... = &varB; > >> *pvar = ioread8(valid_memory); >> >> Depending if ioread8 returns a u8 or a unsigned int, aren't we also >> accessing varC? >> >> Could not this be a problem? > > Please try to compil

[PATCH 0/1] futex: check PF_KTHREAD rather than !p->mm to filter out kthreads

Thomas, et al, could you please review? The change looks trivial, but I simply can not understand this logic, please help. First of all, why exactly do we need this mm/PF_KTHREAD check added by f0d71b3dcb8332f7971 ? Of course, it is simply wrong to declare a random kernel thread to be the owner

[PATCH 1/1] futex: check PF_KTHREAD rather than !p->mm to filter out kthreads

attach_to_pi_owner() checks p->mm to prevent attaching to kthreads and this looks doubly wrong: 1. It should actually check PF_KTHREAD, kthread can do use_mm(). 2. If this task is not kthread and it is actually the lock owner we can wrongly return -EPERM instead of -ESRCH or retry-if-EAGAIN.

Re: [RFC PATCH v3 3/3] mm/compaction: enhance compaction finish condition

On 02/02/2015 02:23 PM, Joonsoo Kim wrote: > 2015-02-02 19:20 GMT+09:00 Vlastimil Babka : >> On 02/02/2015 08:15 AM, Joonsoo Kim wrote: >> >> So I've realized that this problaby won't always work as intended :/ Because >> we >> still differ from what page allocator does. >> Consider we compact for

[PATCH] zram: fix umount-reset_store-mount race condition

Ganesh Mahendran was the first one who proposed to use bdev->bd_mutex to avoid ->bd_holders race condition: CPU0CPU1 umount /* zram->init_done is true */ reset_store() bdev->bd_holders == 0 mount ... zram_mak

Re: sequential I/O on SSD disk varies from 20 to 300 MBytes/s every week

Please check whether write cache is enabled in the drive also check whether NCQ is enabled or not. About caches please note quote from my e-mail below. Changing NCQ enabled/disabled had no effect either. 6) It is not a caching issue (controller/disk caches were off during testing, but even p

Re: [PATCH v4 01/13] clk: samsung: exynos5433: Add binding document for Exynos5433 clock domains

Hi Sylwester, On 02/02/2015 10:55 PM, Sylwester Nawrocki wrote: > Hi Chanwoo, > > On 02/02/15 14:01, Chanwoo Choi wrote: >> This patch adds devicetree binding document for Exynos5433 SoC system clock >> controller. >> >> Cc: Sylwester Nawrocki >> Cc: Tomasz Figa >> Signed-off-by: Chanwoo Choi

Re: Can this be a invalid memory access? (was: Re: [PATCH] spi/xilinx: Cast ioread32/iowrite32 function pointers)

Hi Ricardo, On Mon, Feb 2, 2015 at 3:05 PM, Ricardo Ribalda Delgado wrote: > On Mon, Feb 2, 2015 at 2:04 PM, Geert Uytterhoeven > wrote: >>> void * pvar=varB; >> >> ... = &varB; >> >>> *pvar = ioread8(valid_memory); >>> >>> Depending if ioread8 returns a u8 or a unsigned int, aren't we also >>>

Re: [PATCH] staging: lustre: osc: Fix sparse warning about osc_init

On Mon, Feb 02, 2015 at 02:36:43PM +0100, Andreas Ruprecht wrote: > When running sparse on the osc/ subdirectory, it shows the > following warning: > > andreas@workbox:~/linux-next$ make C=1 M=drivers/staging/lustre/lustre/osc/ > [...] > drivers/staging/lustre/lustre/osc/osc_request.c:3335:12: war

Re: [PATCH] posix_acl: fix reference leaks in posix_acl_create

On Sun, Feb 01, 2015 at 11:55:02PM -0800, Omar Sandoval wrote: > There are already a couple of return paths in posix_acl_create, and > there are only these two error cases, so I think gotos might actually > make the code more confusing. In any case, here's an idea: > > posix_acl: fix reference lea

Re: [RFC PATCH v3 3/3] mm/compaction: enhance compaction finish condition

On 02/02/2015 02:51 PM, Zhang Yanfei wrote: >> I've got another idea for small improvement. We should only test for >> fallbacks >> when migration scanner has scanned (and migrated) a whole pageblock. Should >> be a >> simple alignment test of cc->migrate_pfn. >> Advantages: >> - potentially less

[PATCH v1] Revert "scsi: ufs-qcom-ice: add Inline Crypto Engine (ICE) support for UFS"

This reverts commit 54acb89a8d8682d99ee8594f9ce0dd863a2df80d. Since ICE driver hasn't been uploaded to upstream, ICE support for UFS driver could not be functional at this time. Therefore this change should be reverted. --- drivers/scsi/ufs/Kconfig| 12 - drivers/scsi/ufs/Makefile

[PATCH v5 02/13] clk: samsung: exynos5433: Add clocks using common clock framework

This patch adds the support for CMU (Clock Management Units) of Exynos5433 which is 64bit SoC and has Octa-cores. This patch supports necessary clocks (PLL/MMC/UART/MCT/I2C/SPI) for kernel boot and includes binding documentation for Exynos5433 clock controller. Cc: Sylwester Nawrocki Cc: Tomasz F

[PATCH v5 09/13] clk: samsung: exynos5433: Add clocks for CMU_AUD domain

This patch adds the mux/divider/gate clocks for CMU_AUD domain which includes the clocks of Cortex-A5/Bus/Audio clocks. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 172 + inc

[PATCH v5 13/13] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain

This patch adds the divider/gate of CMU_GSCL domain which contains gscaler clocks. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 146 + include/dt-bindings/clock/exynos5433.h |

[PATCH v5 04/13] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain

This patch adds missing divider/gate clocks of CMU_PERIC domain which includes I2S/PCM/SPDIF/PWM/SLIMBUS IPs. The SPI/I2S may use external input clock which has 'ioclk_*' prefix. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi [ideal.song: Change clk flags of to pclk_gpio_* c

[PATCH v5 00/13] clk: samsung: Add the support for exynos5433 clocks

This patchset adds the support for Exynos5433 CMU (Clock Management Unit) by using common clock framework. This patchset is divided from patch[1] and then sent it. [1] https://lkml.org/lkml/2014/12/2/134 Changelog: Changes from v4: - Add input clock information to binding document Changes from v

[PATCH v5 10/13] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains

This patch adds the mux/divider/gate clocks for CMU_BUS{0|1|2} domains which contain global data buses clocked at up the 400MHz. These blocks transfer data between DRAM and various sub-blocks. These clock domains also contain global peripheral buses clocked at 67/111/200/222/266/333/400 MHz and use

[PATCH v5 06/13] clk: samsung: exynos5433: Add clocks for CMU_G2D domain

This patch adds ths mux/divider/gate clocks of CMU_G2D domain which includes G2D/MDMA IPs. The CMU_G2D must need the clocks related to G2D by providing CMU_TOP domain. So, this patch add several clocks for G2D from CMU_TOP domain. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Cho

[PATCH v5 03/13] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain

This patch adds the MUX (multiplexer) clocks for CMU_TOP domain of Exynos5433. CMU_TOP domain provides source clocks to other CMU domains. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae Reviewed-by: Pankaj Dubey --- drivers/clk/samsung/clk-exynos5433.c

[PATCH v5 11/13] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain

This patch adds the mux/divider/gate clocks for CMU_FSYS domain which contains the clocks of USB/UFS/SDMMC/TSI/PDMA IPs. Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae --- drivers/clk/samsung/clk-exynos5433.c | 302 + in

[PATCH v5 12/13] clk: samsung: exynos5433: Add clocks for CMU_G3D domain

This patch adds the mux/divider/gate clocks for CMU_G3D domain which contains the clocks for GPU(3D Graphics Engine). Cc: Sylwester Nawrocki Cc: Tomasz Figa Signed-off-by: Chanwoo Choi Acked-by: Inki Dae Reviewed-by: Pankaj Dubey --- drivers/clk/samsung/clk-exynos5433.c | 127 +

Re: [PATCH 2/8] KVM: x86: cleanup kvm_apic_match_*()

2015-01-30 09:52+0100, Paolo Bonzini: > On 29/01/2015 22:48, Radim Krčmář wrote: > > The majority of this patch turns > > result = 0; if (CODE) result = 1; return result; > > into > > return CODE; > > because we return bool now. > > Added a bunch of "!= 0" to avoid automagic conversion to bool

[PATCH v5 08/13] clk: samsung: exynos5433: Add clocks for CMU_DISP domain

This patch adds the the mux/divider/gate clocks for CMU_DISP domain which includes the clocks of Display IPs (DECON/HDMI/DSIM/MIXER). The CMU_DISP clocks is used to need the source clock of CMU_MIF domain so, the CMU_MIF's clocks related to CMU_DISP should be always on state. Also, CMU_DISP must n

3.16.0-4-amd64 linux kernel userspace breakage

hi folks, i thought with the focus on "not breaking userspace" a general report of two occurrences of exactly that occurring may be appreciated. firstly: as a long-standing linux user (and minor contributor) i fully appreciate that this is not the "latest version" however this is a live-running st

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