On 20/01/2015 08:54, Wincy Van wrote:
> On Tue, Jan 20, 2015 at 3:34 PM, Paolo Bonzini wrote:
>>> Hence, we can disable local interrupts while delivering nested posted
>>> interrupts to make sure
>>> we are faster than the destination vcpu. This is a bit tricky but it
>>> an avoid that race. I t
Daniel, David,
On 11/30/2014 06:23 PM, Florian Weimer wrote:
> * David Herrmann:
>
>> On Sun, Nov 30, 2014 at 10:02 AM, Florian Weimer wrote:
>>> * Greg Kroah-Hartman:
>>>
+7.4 Receiving messages
>
>>> What happens if this is not possible because the file descriptor limit
>>> of the proce
On Fri, 02 Jan 2015, Javier Martinez Canillas wrote:
> From: Bill Richardson
>
> This adds the LPC interface to the Chrome OS EC. Like the
> I2C and SPI drivers, this allows userspace access to the EC.
I'm fairly certain that this is _not_ an MFD device. Please locate it
to the proper subsyste
Today if the cpu handling broadcasting of wakeups goes offline, the job of
broadcasting is handed over to another cpu in the CPU_DEAD phase. The CPU_DEAD
notifiers are run only after the offline cpu sets its state as CPU_DEAD.
Meanwhile, the kthread doing the offline is scheduled out while waiting
Hi Nicolas,
This patch set is based on Alexandre's patch set of AT91 cleanup for 3.20 #2.
It also includes the patches from Peter Rosin and Sylvain Rochet.
Removes CONFIG_AT91_SLOW_CLOCK config item to simply the PM config,
The suspend to standby mode uses the same sram function as the suspend to
From: Sylvain Rochet
Assume USB PLL and PLL B are already stopped before entering sleep mode,
print a warning if this isn't the case.
Removed timeout on XTAL, PLL lock and Master Clock Ready, hang if
something went wrong instead of continuing in unknown condition. There
is not much we can do if
The SLOWDOWN_MASTER_CLOCK definition is not used, remove the redundant code.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm_slowclock.S | 37 -
1 file changed, 37 deletions(-)
diff --git a/arch/arm/mach-at91/pm_slowclock.S
Murali, Wingman,
On Thu, 2015-01-15 at 19:12 -0500, Murali Karicheri wrote:
> The network coprocessor (NetCP) is a hardware accelerator available in
> Keystone SoCs that processes Ethernet packets. NetCP consists of following
> hardware components
>
> 1 Gigabit Ethernet (GbE) subsystem with a Et
From: Peter Rosin
The DDRSDR controller fails miserably to put LPDDR1 memories in
self-refresh. Force the controller to think it has DDR2 memories
during the self-refresh period, as the DDR2 self-refresh spec is
equivalent to LPDDR1, and is correctly implemented in the
controller.
Assume that th
To decrease the suspend time, move the copying the sram function
to the sram initialization phase, instead of every time go to suspend.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git
On Fri, 02 Jan 2015, Javier Martinez Canillas wrote:
> The ChromeOS EC character device is an user-space interface to
> allow applications to access the Embedded Controller.
>
> Add a cell for this device so it's spawned from the mfd driver.
>
> Signed-off-by: Javier Martinez Canillas
> ---
>
Because the CONFIG_AT91_SLOW_CLOCK will be removed
to simply the PM config, so move select SRAM.
Signed-off-by: Wenyou Yang
---
arch/arm/mach-at91/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 56dcede.
Modify crypto drivers to use the generic SG helper since
both of them are equivalent and the one from crypto is redundant.
See also:
468577abe37ff7b453a9ac613e0ea155349203ae reverted in
b2ab4a57b018aafbba35bff088218f5cc3d2142e
Signed-off-by: Cristian Stoica
---
crypto/ablkcipher.c
To simply the PM code, the suspend to standby mode uses the same sram function
as the suspend to memory mode, running in the internal SRAM,
instead of the respective code for each mode.
But for the suspend to standby mode, the master clock doesn't
switch to the slow clock, and the main oscillator
Because the sram function is used for the suspend to standby mode as well,
more than suspend to memory, so renaming is more elegant.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/Makefile |2 +-
arch/arm/mach-at91/pm_slowclock.S | 280 -
The slow clock always exists, for the suspend to memory mode,
the master clock always switch to the slow clock.
To simplify the PM config, remove this config item, remove
the definition code as well.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/Kconfig | 13
As the file name's renaming, rename the file name at91_slow_clock()-->
at91_pm_suspend_sram_fn, rename the function handler's name at the same time.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c | 23 +++
arch/arm/mach-at91/pm_s
Hi Viresh,
I explained the relation between memory bus group and memory bus block on
following patch[1].
- [1] https://lkml.org/lkml/2015/1/8/642
On 01/20/2015 04:19 PM, Viresh Kumar wrote:
> On 9 January 2015 at 02:48, Rob Herring wrote:
>> Adding Viresh.
>
> Sorry for being too late, I was v
As the file name's renaming, rename the file name at91_slow_clock()-->
at91_pm_suspend_sram_fn, rename the function handler's name at the same time.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c | 23 +++
arch/arm/mach-at91/pm_s
Hi Michael,
On 01/20/2015 09:09 AM, Michael Kerrisk (man-pages) wrote:
> On 11/30/2014 06:23 PM, Florian Weimer wrote:
>> * David Herrmann:
>>
>>> On Sun, Nov 30, 2014 at 10:02 AM, Florian Weimer wrote:
* Greg Kroah-Hartman:
> +7.4 Receiving messages
>>
What happens if this is
Because the the suspend to standby mode uses the sram function,
these functions will not used, remove the redundant code.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.h | 110 ---
1 file changed, 110 deletions(-)
Hi Pavel,
On Tue, Dec 23, 2014, Pavel Machek wrote:
> + while (1) {
> + int cmd, len;
> +
> + fw_pos += cmd_len;
> +
> + if (fw_pos >= fw_entry->size)
> + break;
> +
> + if (fw_pos + 2 > fw_entry->size) {
> +
Because the at91_xxx_standby function is removed,
remove the struct ramc_ids .data members code.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c | 19 ---
1 file changed, 4 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c
Because the at91_xxx_standby() function is substitued by the at91_pm_suspend(),
the pm_suspend entry for at91_cpuidle_device changes as well.
Signed-off-by: Wenyou Yang
Acked-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletion
Ping, any comments on this RFC patch set?
Thanks,
> -Original Message-
> From: Chao Yu [mailto:chao2...@samsung.com]
> Sent: Monday, January 12, 2015 3:09 PM
> To: Jaegeuk Kim; Changman Lee
> Cc: linux-kernel@vger.kernel.org; linux-f2fs-de...@lists.sourceforge.net
> Subject: [f2fs-dev] [R
On Tue, Jan 20, 2015 at 01:17:10AM -0600, Larry Finger wrote:
> Hi,
>
> I just discovered almost 100 of the following entries in my log:
>
> [drm:intel_uncore_check_errors [i915]] *ERROR* Unclaimed register before
> interrupt
>
> Those were accumulated in about 12 hours of operation. I also hav
On Tue, Jan 20, 2015 at 3:37 PM, Lyra Zhang wrote:
> Hi, Rob
>
> I still have a question to be conform, specific describes below:
>
> On Mon, Jan 19, 2015 at 10:11 PM, Rob Herring wrote:
>> On Mon, Jan 19, 2015 at 3:55 AM, Lyra Zhang wrote:
>>> On Sat, Jan 17, 2015 at 12:41 AM, Rob Herring wrot
dts/Makefile is called only for simpleImage target
which is causing that *.dtb are not removed.
This patch fix it.
Signed-off-by: Michal Simek
---
arch/microblaze/boot/Makefile | 3 +--
arch/microblaze/boot/dts/Makefile | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/a
On Fri, Jan 16, 2015 at 06:06:15PM +0100, Stefan Agner wrote:
> On Vybrid, all peripherals are numbered starting with zero,
> including the GPIO and PORT module. However, the labels of the
> corresponding device tree nodes start with one, which is confusing.
> Fix that by renaming the labels of the
Thomas, Noralf,
Your commit c296d5f9957c ("staging: fbtft: core support") is included in
today's linux-next (ie, next-20150120). I noticed because a script I use
to check linux-next spotted a problem in it.
See, that commit adds two checks for CONFIG_ARCH_BCM2708. But there'
On 20 January 2015 at 15:39, Viresh Kumar wrote:
> On 20 January 2015 at 13:03, Pi-Cheng Chen wrote:
>> I will also try to add intermediate frequency support in next version.
>
> Sure
>
>> BTW, do you think it's a good idea to add a new device tree binding like
>> intermediate_clock = <&clksys MA
If vcpu has a interrupt in vmx non-root mode, we will
kick that vcpu to inject interrupt timely. With posted
interrupt processing, the kick intr is not needed, and
interrupts are fully taken care of by hardware.
In nested vmx, this feature avoids much more vmexits
than non-nested vmx.
This patch
On 01/20/2015 08:25 AM, Asaf Vertz wrote:
Fixed the following warnings (reported by cppcheck):
[drivers/staging/iio/impedance-analyzer/ad5933.c:363]: (warning) %d in format
string (no. 1)
requires 'int' but the argument type is 'unsigned int'.
[drivers/staging/iio/impedance-analyzer/ad5933.c:367
On 19/01/15 21:38, Tony Lindgren wrote:
> * Daniel Thompson [150105 04:49]:
>> The omap1's debug-macro.S is similar to the generic 8250 code. Compared to
>> the 8520 code the omap1 macro automatically determines what UART to use
>> based on breadcrumbs left by the bootloader and automatically cope
On 01/19/2015 11:05 AM, Vlastimil Babka wrote:
> Preliminary testing with THP-like allocations has shown similar improvements,
> which is somewhat surprising, because THP allocations do not use sync
> and thus do not defer compaction; but changing the pivot is currently tied
> to restarting from de
Hi Dave,
more fixes for 3.19, I hope these are still appropriate. Please let me
know if there are any issues.
Kalle
The following changes since commit 16dde0d6ac159531a5e03cd3f8bc8a401d9f3fb6:
be2net: Allow GRE to work concurrently while a VxLAN tunnel is configured
(2015-01-15 01:55:05 -050
Tony,
Your commit 4d62dbda8561 ("ARM: OMAP3: Remove legacy support for
am3517-evm") is included in today's linux-next (ie, next-20150120). I
noticed because a script I use to check linux-next spotted a problem
caused by it.
See, your commit removes the Kconfig symbol MACH_O
On 01/20/2015 06:52 AM, Aneesh Kumar K.V wrote:
> Vlastimil Babka writes:
>
>> On 01/17/2015 01:02 AM, Andrew Morton wrote:
>>> On Fri, 16 Jan 2015 12:56:36 +0530 "Aneesh Kumar K.V"
>>> wrote:
>>>
This make sure that we try to allocate hugepages from local node if
allowed by mempolic
Hi Linus,
here is a (hopefully final) slew of pin control fixes for the v3.19 series.
The deadlock fix is kind of serious and tagged for stable, the rest is
business as usual.
Please pull them in!
Yours,
Linus Walleij
The following changes since commit eaa27f34e91a14cdceed26ed6c6793ec1d186115:
Hi, folks
And this is my new mail address ;-)
Regards,
Michael Wang
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Please read the FAQ at http://ww
A NULL pointer dereference was observed as following panic:
BUG: unable to handle kernel NULL pointer dereference at (null)
IP: [] ipc_has_perm+0x4b/0x60
...
Process opcmon (pid: 30712, threadinfo 880237f2a000,
task 88022ac70e40)
Stack:
880237f2bc04 01020953 880237f2bce8
ff
This series adds a pinctrl driver for Snapdragon 410 (msm8916) SoC. The first
patch increase the register address variable size, next adds a binding document
and the last patch adds the pinctrl driver
Comments are welcome!
regards,
Stan
Joonwoo Park (2):
pinctrl: qcom: increase variable size f
From: Joonwoo Park
Newer MSM SoCs have TLMM hardware block upper than 16 bit. Increase to
32 bit registers to hold addresses correctly.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
---
drivers/pinctrl/qcom/pinctrl-msm.h | 10 +-
1 files changed, 5 insertions(+), 5 d
Heikki Krogerus (3):
phy: add bus for USB ULPI PHYs
usb: dwc3: add ULPI interface support
phy: ulpi: add driver for TI TUSB1210
MAINTAINERS| 7 ++
drivers/phy/Kconfig| 2 +
drivers/phy/Makefile | 1 +
drivers/phy/ulpi/Kconfig
TUSB1210 ULPI PHY has vendor specific register for eye
diagram tuning. On some platforms the system firmware has
set optimized value to it. In order to not loose the
optimized value, the driver stores it during probe and
restores it every time the PHY is powered back on.
Signed-off-by: Heikki Krog
From: Joonwoo Park
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8916.
Signed-off-by: Joonwoo Park
Signed-off-by: Stanimir Varbanov
---
drivers/pinctrl/qcom/Kconfig |8 +
drivers/pinctrl/qcom/Makefile |1 +
drivers/pinctrl/qco
On Wed, 2015-01-14 at 17:08 -0800, Kevin Hilman wrote:
> From: Kevin Hilman
>
> The odroid-xu3 has 4 INA231 current sensors on board which can be
> accessed from the Linux via the hwmon interface.
>
> There is one sensor for each of these power rails:
>
> - A15 cluster: VDD_ARM
> - A7 cluster:
Adds devicetree binding documentation.
Signed-off-by: Stanimir Varbanov
---
.../bindings/pinctrl/qcom,msm8916-pinctrl.txt | 186
1 files changed, 186 insertions(+), 0 deletions(-)
create mode 100644
Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
UTMI+ Low Pin Interface (ULPI) is a commonly used PHY
interface for USB 2.0. It describe a standard set of
registers which the vendors can extend for their specific
needs.
ULPI registers are accessed from the controller. The purpose
of the bus is to provide nice way for the controller drivers
to s
Registers ULPI interface with the ULPI bus if HSPHY type is
ULPI.
Signed-off-by: Heikki Krogerus
Cc: Felipe Balbi
---
drivers/usb/dwc3/Kconfig | 7
drivers/usb/dwc3/Makefile | 4 ++
drivers/usb/dwc3/core.c | 9 +++-
drivers/usb/dwc3/core.h | 22 ++
drivers/usb/dwc3/ulpi
S
into the common space") in today's linux-next (ie, next-20150120). I
noticed because a script I use to check linux-next spotted a problem in
it.
> MAINTAINERS | 1 +
> arch/arm/Kconfig.debug| 9 ++
Provide CLK support for Alphascale ASM9260 SoC.
Signed-off-by: Oleksij Rempel
---
drivers/clk/Makefile | 1 +
drivers/clk/clk-asm9260.c | 348 +
include/dt-bindings/clock/alphascale,asm9260.h | 97 +++
3 files changed,
On 19/01/15 21:38, Tony Lindgren wrote:
> * Tony Lindgren [150119 10:52]:
>> * Roger Quadros [150119 09:55]:
>>> Both are needed for USB cable type detection on dra7-evm.
>>>
>>> Signed-off-by: Roger Quadros
>>> ---
>>> arch/arm/configs/omap2plus_defconfig | 2 ++
>>> 1 file changed, 2 insertio
Fixed the following warnings (reported by cppcheck):
[drivers/staging/iio/light/tsl2x7x_core.c:1150]: (warning) %d in format string
(no. 1)
requires 'int' but the argument type is 'unsigned int'.
[drivers/staging/iio/light/tsl2x7x_core.c:1150]: (warning) %d in format string
(no. 2)
requires 'int'
On 2015年01月20日 02:01, Mark Rutland wrote:
On Mon, Jan 19, 2015 at 05:52:33PM +, Catalin Marinas wrote:
On Mon, Jan 19, 2015 at 04:59:47PM +, Jon Masters wrote:
On 01/19/2015 10:13 AM, Grant Likely wrote:
On Mon, 19 Jan 2015 13:51:45 +
, Catalin Marinas
wrote:
On Mon, Jan 19, 20
On Mon, 19 Jan 2015, Jiang Liu wrote:
> Hi Thomas and Marc,
> During working on the generic MSI support, I have some proposal
> about reorganizing struct irq_data and struct irq_desc. The proposed
> changes are:
> 1) Add a pointer "struct irq_desc *" to struct irq_data, so we could
>quic
On Tue, Jan 13, 2015 at 04:33:54PM +, Will Deacon wrote:
> Hi Paul,
>
> I started dusting off a series I've been working to implement a relaxed
> atomic API in Linux (i.e. things like atomic_read(v, ACQUIRE)) but I'm
> having trouble making sense of the ordering semantics we have in mainline
>
In concat_read_oob both retlen and oobretlen is updated.
concat_write_oob previously only updated retlen.
Signed-off-by: Niklas Cassel
---
drivers/mtd/mtdconcat.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index b900056
Hi Hans,
On Mon, Jan 19, 2015 at 5:45 PM, Hans Verkuil wrote:
> On 01/19/2015 04:13 AM, Hao Liang wrote:
>> Hi Hans,
>>
>> Thank you for your reply.
>> This change comes largely from a non-blackfin architecture dsp processor of
>> ADI want to reuse this driver.
>> And i have tested common read/w
Dan Carpenter writes:
> On Mon, Jan 19, 2015 at 05:56:11PM +0100, Vitaly Kuznetsov wrote:
>> vmbus_device_create() result is not being checked in vmbus_process_offer()
>> and
>> it can fail if kzalloc() fails. Add the check and do minor cleanup to avoid
>> additional duplication of "free_channel
On Fri, Jan 16, 2015 at 11:23 AM, Yingjoe Chen
wrote:
> On Fri, 2015-01-16 at 10:53 +0100, Linus Walleij wrote:
>> On Tue, Jan 13, 2015 at 5:16 PM, Sascha Hauer wrote:
>> > On Tue, Jan 13, 2015 at 11:05:22AM +0100, Linus Walleij wrote:
>>
>> >> > You often talk about ambiguities. Could you give a
On Tue, 20 Jan 2015, 敬锐 wrote:
> On 01/19/2015 03:47 PM, Lee Jones wrote:
> > On Mon, 19 Jan 2015, 敬锐 wrote:
> >> >On 01/18/2015 08:29 PM, Lee Jones wrote:
> >>> > >On Thu, 15 Jan 2015,micky_ch...@realsil.com.cn wrote:
> >>> > >
> > >>From: Micky Ching
> > >>
> > >>update phy regist
This adds the reset defines for the MT8135/MT8173 pericfg and infracfg
controllers. Needed for device trees to specify the reset numbers in
pericfg / infracfg reset consumers
Signed-off-by: Sascha Hauer
---
.../dt-bindings/reset-controller/mt8135-resets.h | 64 ++
.../dt-bi
This adds support for the MediaTek infracfg controller found
on the MT8135/MT8173 SoCs. The infracfg controller contains
miscellaneous registers for controlling peripheral resets and
clocks.
Signed-off-by: Sascha Hauer
---
.../devicetree/bindings/soc/mediatek/infracfg.txt | 19 +++
drivers/soc
This adds support for the MediaTek pericfg controller found
on the MT8135/MT8173 SoCs. The pericfg controller contains
miscellaneous registers for controlling peripheral resets and
clocks.
Signed-off-by: Sascha Hauer
---
.../devicetree/bindings/soc/mediatek/pericfg.txt | 19
On Tue, Jan 20, 2015 at 05:07:19PM +1030, Rusty Russell wrote:
> Andrey Tsyvarev writes:
> > parse_args call module parameters' .set handlers, which may use locks
> > defined in the module.
> > So, these classes should be freed in case parse_args returns error(e.g. due
> > to incorrect parameter
The MT8135 eval board contains a MT6397 PMIC. This adds the
corresponding device node to the dts file.
Signed-off-by: Sascha Hauer
---
arch/arm/boot/dts/mt8135-evbp1.dts | 193 +
1 file changed, 193 insertions(+)
diff --git a/arch/arm/boot/dts/mt8135-evbp1.dt
On Mon, 19 Jan 2015, Alexandre Belloni wrote:
> Hi Lee,
>
> On 19/01/2015 at 09:42:24 +, Lee Jones wrote :
> > On Mon, 12 Jan 2015, Alexandre Belloni wrote:
> >
> > > The Atmel System Timer IP available on the at91rm9200 exposes both a
> > > timer and a
> > > watchdog.
> > >
> > > Signed-o
This adds the perisys, infracfg and pmic wrapper nodes to the
MediaTek MT8135 dtsi file.
Signed-off-by: Sascha Hauer
---
arch/arm/boot/dts/mt8135.dtsi | 34 ++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.
From: Flora Fu
This adds support for the regulators on the MediaTek MT6397
Multifunction device.
Signed-off-by: Flora Fu, MediaTek
Signed-off-by: Sascha Hauer
Cc: Liam Girdwood
Cc: Mark Brown
---
Documentation/devicetree/bindings/mfd/mt6397.txt | 41 ++-
.../bindings/regulator/mt6397-regu
From: Flora Fu
This adds support for the MediaTek MT6397 PMIC. This is a
multifunction device with the following sub modules:
- Regulator
- RTC
- Audio codec
- GPIO
- Clock
It is interfaced to the host controller using SPI interface by a proprietary
hardware called PMIC wrapper or pwrap. MT6397
From: Flora Fu
This adds support for the PMIC wrapper found on MediaTek MT8135 and
MT8173 SoCs.
On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via
SPI. The SPI master interface is not directly visible to the CPU, but
only through the PMIC wrapper inside the SoC. The communicatio
This series adds initial support for the MediaTek MT6397 PMIC and the
necessary infrastructure to attach it on the MT8135 / MT8173 SoCs.
The infrastructure includes:
- pericfg / infracfg controller support
The pericfg / infracfg controllers contain miscellaneous registers for
reset controller
On Sat, Jan 17, 2015 at 1:11 AM, Ray Jui wrote:
> On 1/16/2015 2:14 AM, Linus Walleij wrote:
>> Some hardware designs put the software-controlled biasing
>> resistors in the GPIO block electronically connected to the actual
>> pins, so that e.g. the biasing will be available if some MMC or
>> wha
On 20/01/2015 09:48, Wincy Van wrote:
> +static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
> + int vector)
> +{
> + int r = 0;
> + struct vmcs12 *vmcs12;
> +
> + /*
> +* Since posted intr delivery is async
On 20/01/15 02:21, Jiang Liu wrote:
> Currently Xen Domain0 has special treatment for ACPI SCI interrupt,
> that is initialize irq for ACPI SCI at early stage in a special way as:
> xen_init_IRQ()
> ->pci_xen_initial_domain()
> ->xen_setup_acpi_sci()
> Allo
On 20/01/15 02:21, Jiang Liu wrote:
> Xen overrides __acpi_register_gsi and leaves __acpi_unregister_gsi as is.
> That means, an IRQ allocated by acpi_register_gsi_xen_hvm() or
> acpi_register_gsi_xen() will be freed by acpi_unregister_gsi_ioapic(),
> which may cause undesired effects. So override
On Fri, 9 Jan 2015, Josh Poimboeuf wrote:
> Add support for patching a function multiple times. If multiple patches
> affect a function, the function in the most recently enabled patch
> "wins". This enables a cumulative patch upgrade path, where each patch
> is a superset of previous patches.
Since commit 33fb845a6f01 ("powerpc/8xx: Don't use MD_TWC for walk"), MD_EPN and
MD_TWC are not writen anymore in FixupDAR so saving r3 has become useless.
Signed-off-by: Christophe Leroy
---
v2: no change
arch/powerpc/kernel/head_8xx.S | 6 --
1 file changed, 6 deletions(-)
diff --git a/
When pages are not 4K, PGDIR table is allocated with kmalloc(). In order to
optimise TLB handlers, aligned memory is needed. kmalloc() doesn't provide
aligned memory blocks, so lets use a kmem_cache pool instead.
Signed-off-by: Christophe Leroy
---
v2: changed to apply cleanly to linux-next (due
In order to be able to reduce scope during which CR is saved, we take
CR saving/restoring out of exception PROLOG and EPILOG
Signed-off-by: Christophe Leroy
---
v2: no change
arch/powerpc/kernel/head_8xx.S | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/powe
Having a macro will help keep clear code.
Signed-off-by: Christophe Leroy
---
v2: no change
arch/powerpc/kernel/head_8xx.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a1571b3..0658
This patchset provides a further optimisation of TLB handling in the 8xx.
Main changes are based on:
- Using processor handling of PGD/PTE Validity bits instead of testing ourselves
the entries validity
- Aligning PGD address to allow direct bit manipulation
- Not saving registers like CR when not
On Sat, Jan 17, 2015 at 7:15 PM, Beniamino Galvani wrote:
> This is a driver for the pinmux and GPIO controller available in
> Amlogic Meson SoCs. It currently supports only Meson8, however the
> common code should be generic enough to work also for other SoCs after
> having defined the proper se
This adds a new system call, epoll_mod_wait. It's described as below:
NAME
epoll_mod_wait - modify and wait for I/O events on an epoll file
descriptor
SYNOPSIS
int epoll_mod_wait(int epfd, int flags,
int ncmds, struct epoll_mod_cmd
Two structs involved in the coming syscall is defined. Flags in epoll_mod_cmd
are reserved, which makes better word alignment and may allow future extension.
Signed-off-by: Fam Zheng
---
include/uapi/linux/eventpoll.h | 20
1 file changed, 20 insertions(+)
diff --git a/incl
Later we will add clockid in the interface, so let's start using explicit
clockid internally. Now we specify CLOCK_MONOTONIC, which is the same as before.
Signed-off-by: Fam Zheng
---
fs/eventpoll.c | 27 +++
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a
This is a common part from epoll_ctl implementation which will be shared with
the coming epoll_mod_wait.
Signed-off-by: Fam Zheng
---
fs/eventpoll.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/fs/eventpoll.c b/fs/eventpoll.c
index 6da143f..e7a1
On Tue, 20 Jan 2015, Preeti U Murthy wrote:
> --- a/kernel/time/tick-broadcast.c
> +++ b/kernel/time/tick-broadcast.c
> @@ -675,8 +675,8 @@ static void broadcast_move_bc(int deadcpu)
>
> if (!bc || !broadcast_needs_cpu(bc, deadcpu))
> return;
> - /* This moves the broadcas
Signed-off-by: Fam Zheng
---
arch/x86/syscalls/syscall_32.tbl | 1 +
arch/x86/syscalls/syscall_64.tbl | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/syscalls/syscall_32.tbl b/arch/x86/syscalls/syscall_32.tbl
index b3560ec..52aead3 100644
--- a/arch/x86/syscalls/syscall_32.tbl
+++
This syscall is a sequence of
1) a number of epoll_ctl calls
2) a epoll_pwait, with timeout enhancement.
The epoll_ctl operations are embeded so that application doesn't have to use
separate syscalls to insert/delete/update the fds before poll. It is more
efficient if the set of fds varies from o
In preparation of epoll_mod_wait, this patch allows reusing the code from
epoll_pwait implementation. The new functions uses ktime_t for more accuracy.
Signed-off-by: Fam Zheng
---
fs/eventpoll.c | 130 ++---
1 file changed, 59 insertions(+), 7
On 2015/1/20 17:31, Thomas Gleixner wrote:
> On Mon, 19 Jan 2015, Jiang Liu wrote:
>
>> Hi Thomas and Marc,
>> During working on the generic MSI support, I have some proposal
>> about reorganizing struct irq_data and struct irq_desc. The proposed
>> changes are:
>> 1) Add a pointer "struct i
L1 base address is now aligned so we can insert L1 index into r11 directly and
then preserve r10
Signed-off-by: Christophe Leroy
---
v2: no change
arch/powerpc/kernel/head_8xx.S | 34 +++---
1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/arch/powerp
dev_set_name() takes three arguments where the second argument is
a format string. This patch fixes the call accordingly in tpm-chip.c
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm-chip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm-chip.c b/
Document the settings exported by max77693 charger driver through sysfs
entries:
- fast_charge_timer
- top_off_threshold_current
- top_off_timer
Signed-off-by: Krzysztof Kozlowski
---
Documentation/ABI/testing/sysfs-class-power | 42 +
1 file changed, 42 insertions
Signed-off-by: Christophe Leroy
---
v2: no change
arch/powerpc/kernel/head_8xx.S | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a485ad7..a1571b3 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++
Kernel MMU handling code handles validity of entries via _PMD_PRESENT which
corresponds to V bit in MD_TWC and MI_TWC. When the V bit is not set, MPC8xx
triggers TLBError exception. So we don't have to check that and branch ourself
to TLBError. We can set TLB entries with non present entries, remov
Dear Sebastian,
You already acked some earlier version of this patch. In that time
there were more dependencies on MFD tree. Now the MFD patch (2/5)
is acked by Lee Jones so could you pick up everything?
Changes since v4
1. Add patch 5/5: Update MAINTAINERS (with Sebastian's ac
Add myself as supporter to help in reviewing patches for Maxim 14577 and
77693 MUIC charger drivers. These are used on Exynos-based boards
(Trats 2, Gear 1 and Gear 2).
Signed-off-by: Krzysztof Kozlowski
Cc: Sebastian Reichel
Cc: Dmitry Eremin-Solenikov
Cc: David Woodhouse
Acked-By: Sebastian
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