There are some extra spaces, so just remove them from these lines.
Signed-off-by: Kaixu Xia
---
drivers/coresight/coresight-etb10.c | 2 +-
drivers/coresight/coresight.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/coresight/coresight-etb10.c
b/drivers/co
This adds support for Vybrid's interrupt router. On VF6xx models,
almost all peripherals can be accessed from either of the two
CPU's, from the Cortex-A5 or from the Cortex-M4. The interrupt
router routes the peripheral interrupts to the configured CPU.
The driver makes use of the irqdomain hierar
Splitted out version of the MSCM driver. My first driver based on the
routeable domain support and was part of the Vybrid Cortex-M4 support
patchset.
So far the MSCM interrupt router was initialized by the boot loader
and configured all interrupts for the Cortex-A5 CPU. There are two
use cases whe
Add binding documentation for Miscellaneous System Control Module
found in Freescale Vybrid SoC's.
Signed-off-by: Stefan Agner
---
.../bindings/arm/freescale/fsl,vf610-mscm.txt | 19 +++
1 file changed, 19 insertions(+)
create mode 100644
Documentation/devicetree/bindin
Add the Miscellaneous System Control Module (MSCM) to the base
device tree for Vybrid SoC's. This module contains the peripheral
interrupt router, which handles the routing of the interrupts
for the two CPU cores. Almost all peripheral interrupts are
handled by the router, hence we make the MSCM mo
(2015/01/15 0:39), Steven Rostedt wrote:
> From: "Steven Rostedt (Red Hat)"
>
> As the set_ftrace_filter affects both the function tracer as well as the
> function graph tracer, the ops that represent each have a shared
> ftrace_ops_hash structure. This allows both to be updated when the filter
>
On Thu, Jan 15, 2015 at 01:52:49AM +0100, Sebastian Reichel wrote:
> Thanks for the cleanup, applied:
>
> http://git.infradead.org/battery-2.6.git/commit/d84ba07c27fafca3cc77b25a1e204383a4b5af91
Thanks for the heads up.
Cheers,
Frans
--
To unsubscribe from this list: send the line "unsubscribe l
Hi,
On Sunday 11 January 2015 06:08 PM, Yaniv Gardi wrote:
> This change adds a support for a 20nm qcom-ufs phy that is required in
> platforms that use ufs-qcom controller.
>
> Signed-off-by: Yaniv Gardi
>
> ---
> drivers/phy/Kconfig | 7 +
> drivers/phy/Makefile
On Thu, 15 Jan 2015 16:40:32 +0900
Joonsoo Kim wrote:
[...]
>
> I saw roughly 5% win in a fast-path loop over kmem_cache_alloc/free
> in CONFIG_PREEMPT. (14.821 ns -> 14.049 ns)
>
> Below is the result of Christoph's slab_test reported by
> Jesper Dangaard Brouer.
>
[...]
Acked-by: Jesper Dang
At Wed, 14 Jan 2015 23:51:30 -0800,
Davidlohr Bueso wrote:
>
> On Thu, 2015-01-15 at 08:33 +0100, Takashi Iwai wrote:
> > At Wed, 14 Jan 2015 23:11:43 -0800,
> > Davidlohr Bueso wrote:
> > >
> > > From: Davidlohr Bueso
> > >
> > > Call __set_current_state() instead of assigning the new state di
Hi Arnd, Francois
The nss-gmac driver is for the internal GMAC IP in the Qualcomm IPQ806x
SoC. There are 2 ARM cores and 2 NSS cores inside the IPQ806x SoC. The
main purpose of these NSS cores is to offload the networking stack from
the ARM cores to achieve high performance at routing/ipsec..etc w
On śro, 2015-01-14 at 14:25 -0800, Mike Turquette wrote:
> Quoting Stephen Boyd (2015-01-08 13:23:13)
> > On 01/05/2015 01:52 AM, Krzysztof Kozlowski wrote:
> > > The memory allocated by basic clock divider/gate/mux (struct clk_gate,
> > > clk_divider and clk_mux) was leaking. During driver unbind
On Thu, 2015-01-15 at 09:11 +0100, Takashi Iwai wrote:
> Well, it's a bit unusual. Why do they need to differ? Is the author
> another Davidlohr? :) If this form is preferred, I'm willing to
> apply, but I just wonder...
Personal taste, really. Yes I'd prefer you apply as is.
Thanks,
Davidlohr
+ Mike, Stephen (Clock maintainers)
On 12 January 2015 at 10:23, Krzysztof Kozlowski
wrote:
> Hi,
>
>
> I would like to hear some comments about idea of scaling MMC clock
> frequency. The basic idea is to lower the clock when device is
> completely idle or not busy enough.
We already have host d
This was causing the destination instead of the source to be filled.
As a result, the source was typically all mapped to one zero page,
and hence very cacheable
---
tools/perf/bench/mem-memcpy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/perf/bench/mem-memcpy.c b
On Wednesday, January 14, 2015 11:18:52 AM Moritz Fischer wrote:
> Hi,
>
> attached a simple patch fixing a checkpatch warning about
> printk(KERN_INFO vs pr_info.
Which is not going to be applied unless it fixes a functional problem.
Thanks!
--
I speak only for myself.
Rafael J. Wysocki, Inte
Hi,
please send the patch for removing that FIXME.
Thanks,
Michal
On 01/09/2015 09:46 PM, nick wrote:
> Greetings Michal and others,
> I am wondering about the patch I sent at the beginning of last month for
> removing the
> comment from the function,ace_probe for hard coding the bus width. In
At Thu, 15 Jan 2015 00:17:25 -0800,
Davidlohr Bueso wrote:
>
> On Thu, 2015-01-15 at 09:11 +0100, Takashi Iwai wrote:
> > Well, it's a bit unusual. Why do they need to differ? Is the author
> > another Davidlohr? :) If this form is preferred, I'm willing to
> > apply, but I just wonder...
>
>
From: Mark Glover
Signed-off-by: Mark Glover
---
drivers/usb/serial/ftdi_sio.c | 17 +
drivers/usb/serial/ftdi_sio_ids.h | 21 +
2 files changed, 38 insertions(+)
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 1ebb3
current->reclaim_state is only used to count the number of slab pages
reclaimed by shrink_slab(). So instead of initializing it before we are
going to call try_to_free_pages() or shrink_zone(), let's set in
directly in shrink_slab().
Note that after this patch try_to_free_mem_cgroup_pages() will c
Hello,
On Wed, Jan 14, 2015 at 02:23:32PM -0800, Ray Jui wrote:
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
some of them are not needed. I tested on amd64 and efm32 and could drop
linux/device.h, lin
Hi Eduardo,
> On Wed, Jan 14, 2015 at 04:01:06PM +0100, Lukasz Majewski wrote:
> > Hi Eduardo,
> >
> > > On Fri, Jan 02, 2015 at 02:54:28PM -0400, Eduardo Valentin wrote:
> > > > On Mon, Dec 22, 2014 at 05:27:41PM +0100, Lukasz Majewski wrote:
> > > > > Odroid U3 fan can work without being regist
Remove fixed regulators (duplicating what max77686 provides) and
add GPIO enable control to max77686 regulators.
This gives the system full control over those regulators. Previously
the state of such regulators was a mixture of what max77686 driver set
over I2C and what regulator-fixed set through
Hi Kukjin,
I grouped into one patchset already posted patches for Trats2 board:
1. Fuel gauge:
https://lkml.org/lkml/2015/1/7/167
2. Suspend configuration for max77686 regulators:
https://lkml.org/lkml/2014/10/29/262
3. GPIO control for max77686 regulators:
https://lkml.org/lkml/2015/1/5
Add node for fuel gauge present in Maxim 77693 PMIC. This allows control
over battery charging state on Trats2 board.
The fuel gauge is compatible with max17042 battery driver (Maxim
17042/17047/17050). Although datasheet rev 2.2 for MAX77693 describes
fuel gauge as Maxim 17042-like, the chip on
Add suspend to RAM configuration for max77686 regulators. Some LDOs and
bucks are disabled. This reduces energy consumption during S2R,
approximately from 17 mA to 9 mA.
Additionally remove old and not supported bindings:
- regulator-mem-off
- regulator-mem-idle
- regulator-mem-on
The max77686
On Thu, Jan 15, 2015 at 1:38 AM, Stephen Rothwell wrote:
> Today's linux-next merge of the renesas tree got a conflict in
> arch/arm/boot/dts/Makefile between commit cb612390e546 ("ARM: dts: Only
> build dtb if associated Arch and/or SoC is enabled") from the arm-soc
> tree and commits 9ccba8abd0a
Hello,
On Wed, Jan 14, 2015 at 02:23:33PM -0800, Ray Jui wrote:
> Add I2C device nodes and its properties in bcm-cygnus.dtsi but keep
> them disabled there. Individual I2C devices can be enabled in board
> specific dts file when I2C slave devices are enabled in the future
s/$/./
>
> Signed-off-b
From: Borislav Petkov
arch/x86/kvm/emulate.c: In function ‘check_cr_write’:
arch/x86/kvm/emulate.c:3552:4: warning: left shift count >= width of type
rsvd = CR3_L_MODE_RESERVED_BITS & ~CR3_PCID_INVD;
happens because sizeof(UL) on 32-bit is 4 bytes but we shift it 63 bits
to the left.
Signed
On Thu, Jan 15, 2015 at 10:15:34AM +0200, Bruce Merry wrote:
> This was causing the destination instead of the source to be filled.
> As a result, the source was typically all mapped to one zero page,
> and hence very cacheable
Almost right ;-)
Please have a look at Documentation/SubmittingPatche
Hi,
On 13-01-15 15:22, Gregory CLEMENT wrote:
The current implementation of the libahci allows using multiple PHYs
but not multiple regulators. This patch adds the support of multiple
regulators. Until now it was mandatory to have a PHY under a subnode,
now a port subnode can contain either a re
On Wednesday, January 14, 2015 10:42:23 AM David Woodhouse wrote:
>
> --=-3dIl43yXcWwu/nzOqQWw
> Content-Type: multipart/mixed; boundary="=-ca0AFM5hvqL+pJIndiHh"
>
>
> --=-ca0AFM5hvqL+pJIndiHh
> Content-Type: text/plain; charset="UTF-8"
> Content-Transfer-Encoding: quoted-printable
>
> I'm look
Signed-off-by: Masahiro Yamada
---
Documentation/devicetree/bindings/gpio/gpio.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt
b/Documentation/devicetree/bindings/gpio/gpio.txt
index b9bd1d6..f7a158d 100644
--- a/Docum
Hi Alexandre
> -Original Message-
> From: linux-arm-kernel [mailto:linux-arm-kernel-boun...@lists.infradead.org]
> On
> Behalf Of Alexandre Belloni
> Sent: Tuesday, January 13, 2015 5:24 AM
> To: Ferre, Nicolas
> Cc: Boris Brezillon; Alexandre Belloni; Jean-Christophe Plagniol-Villard;
>
On Wed, 2015-01-14 at 14:56 +0100, Lukasz Majewski wrote:
> Hi Sjoerd,
> Could you review v2 of this patch series?
>
> http://www.spinics.net/lists/devicetree/msg63159.html
I skimmed it yesterday, I'll try to find some time to send you my review
comments later in the week/start of next.
Do you
Hi Linus,
Here is one more mmc fix for 3.19, take 3. I expect this to be the
last fix for mmc for 3.19.
Do note that it's based on your master branch from yesterday and not
on an rc which is what I do normally. If you don't like it like this,
I can re-base it next week.
Details are as usual foun
ACCESS_ONCE does not work reliably on non-scalar types. For
example gcc 4.6 and 4.7 might remove the volatile tag for such
accesses during the SRA (scalar replacement of aggregates) step
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145)
Change the ppc/kvm code to replace ACCESS_ONCE with READ_O
Folks,
fyi, this is my current patch queue for the next merge window. It
does contain a patch that will disallow ACCESS_ONCE on non-scalar
types.
The tree is part of linux-next and can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/borntraeger/linux.git linux-next
Christian Borntraeg
ACCESS_ONCE does not work reliably on non-scalar types. For
example gcc 4.6 and 4.7 might remove the volatile tag for such
accesses during the SRA (scalar replacement of aggregates) step
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145)
Fixup gup_pmd_range.
Signed-off-by: Christian Borntraeger
Commit a91ed664749c ("kernel: tighten rules for ACCESS ONCE") results in
sparse warnings like "Using plain integer as NULL pointer" - Let's add a
type cast to the dummy assignment.
To avoid warnings lik "sparse: warning: cast to restricted __hc32" we also
use __force on that cast.
Fixes: a91ed6647
Now that all non-scalar users of ACCESS_ONCE have been converted
to READ_ONCE or ASSIGN once, lets tighten ACCESS_ONCE to only
work on scalar types.
This variant was proposed by Alexei Starovoitov.
Signed-off-by: Christian Borntraeger
Reviewed-by: Paul E. McKenney
---
include/linux/compiler.h |
On Thursday, January 08, 2015 10:25:10 AM Heikki Krogerus wrote:
> On Thu, Dec 18, 2014 at 10:23:18AM +0200, Heikki Krogerus wrote:
> > This makes it possible to assign GPIOs at runtime. The
> > motivation for it is because of need to forward GPIOs from
> > one device to an other. That feature may
ACCESS_ONCE does not work reliably on non-scalar types. For
example gcc 4.6 and 4.7 might remove the volatile tag for such
accesses during the SRA (scalar replacement of aggregates) step
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145)
Change the p2m code to replace ACCESS_ONCE with READ_ONCE.
ACCESS_ONCE does not work reliably on non-scalar types. For
example gcc 4.6 and 4.7 might remove the volatile tag for such
accesses during the SRA (scalar replacement of aggregates) step
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145)
Change the ppc/hugetlbfs code to replace ACCESS_ONCE with
From: Guenter Roeck
Commit a91ed664749c ("kernel: tighten rules for ACCESS ONCE") results in a
compile failure for sh builds with CONFIG_X2TLB enabled.
arch/sh/mm/gup.c: In function 'gup_get_pte':
arch/sh/mm/gup.c:20:2: error: invalid initializer
make[1]: *** [arch/sh/mm/gup.o] Error 1
Replace
commit 78bff1c8684f ("x86/ticketlock: Fix spin_unlock_wait() livelock")
introduced another ACCESS_ONCE case in x86 spinlock.h.
Change that as well.
Signed-off-by: Christian Borntraeger
Cc: Oleg Nesterov
---
arch/x86/include/asm/spinlock.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Wed, Jan 14, 2015 at 02:10:45PM -0800, Sukadev Bhattiprolu wrote:
>
> From 8e6fb4c58d0d9f4798c191d840e32084b1217cc3 Mon Sep 17 00:00:00 2001
> From: Sukadev Bhattiprolu
> Date: Fri, 21 Nov 2014 20:33:53 -0500
> Subject: [PATCH 1/1] Use dwfl_report_elf() instead of offline.
>
> dwfl_report_off
On Wed, 2015-01-14 at 18:24 -0800, Jesse Gross wrote:
> On Fri, Dec 26, 2014 at 3:58 PM, Jesse Gross wrote:
> > On Fri, Dec 5, 2014 at 2:12 PM, Jeff Kirsher
> > wrote:
> >> On Fri, 2014-12-05 at 10:41 -0800, Joe Stringer wrote:
> >>> ndo_gso_check() was recently introduced to allow NICs to report
On Wednesday, January 14, 2015 08:32:12 AM Darren Hart wrote:
>
> On 1/14/15 4:58 AM, Linus Walleij wrote:
> > On Thu, Dec 18, 2014 at 9:23 AM, Heikki Krogerus
> > wrote:
> >
> >> This makes it possible to assign GPIOs at runtime. The
> >> motivation for it is because of need to forward GPIOs fr
sound/soc/sirf/sirf-atlas7-cs42xx8.c:192:3-8: No need to set .owner here. The
core will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
CC: Yibo Cai
Signed-off-by: Fengguang Wu
---
sirf-atlas7-cs42xx8.
On Wed, Jan 14, 2015 at 02:18:21PM +0200, Alexander Shishkin wrote:
> +static __init int pt_init(void)
> +{
> + pt_pmu.pmu.attr_groups = pt_attr_groups;
> + pt_pmu.pmu.task_ctx_nr = perf_hw_context;
I just noticed this one, how can this ever work? We want the PT thing to
always get prog
On Wed, 14 Jan 2015, Rob Herring wrote:
> On Wed, Jan 14, 2015 at 4:36 AM, Thomas Gleixner wrote:
> > All attempts to work around that have resulted in horrible bandaids so
> > far. That's why I guided Boris to implement this dummy demultiplexing
> > mechanism. It solves the problem at hand nicely
2015-01-15 17:05 GMT+08:00 kbuild test robot :
> sound/soc/sirf/sirf-atlas7-cs42xx8.c:192:3-8: No need to set .owner here. The
> core will do it.
>
> Remove .owner field if calls are used which set it automatically
>
> Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
>
> CC: Yibo
Hi,
Thank you for your review.
On 15/01/2015 at 08:53:54 +, Yang, Wenyou wrote :
> > config AT91_SLOW_CLOCK
> > bool "Suspend-to-RAM disables main oscillator"
> > + select SRAM
> Can we move it under config ARCH_AT91 or other place?
>
> It may be used for other purposes, more than pm
V4: - Added bus lock to i2c_dw_init() as suggested by Jarrko Nikula
. Addresses infrequent hang that was
seen occuring during probe.
- Added label in i2c_dw_xfer() to bypass unnecessary lock release when
acquire fails. Suggested by Mika.
- Changed m
On 01/15/2015 02:01 AM, Andrea Arcangeli wrote:
> Hello,
>
> I would like to attend this year (2015) LSF/MM summit. I'm
> particularly interested about the MM track, in order to get help in
> finalizing the userfaultfd feature I've been working on lately.
I'd like the +1 this. I'm also interested
Adds support for acquiring and releasing a hardware bus lock in the i2c
designware core transfer function. This is needed for i2c bus controllers
that are shared with but not controlled by the kernel.
Signed-off-by: David E. Box
---
drivers/i2c/busses/i2c-designware-core.c | 26 +
This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.
On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and th
On czw, 2015-01-15 at 09:20 +0100, Ulf Hansson wrote:
> + Mike, Stephen (Clock maintainers)
>
> On 12 January 2015 at 10:23, Krzysztof Kozlowski
> wrote:
> > Hi,
> >
> >
> > I would like to hear some comments about idea of scaling MMC clock
> > frequency. The basic idea is to lower the clock when
This was causing the destination instead of the source to be filled.
As a result, the source was typically all mapped to one zero page,
and hence very cacheable.
Signed-off-by: Bruce Merry
---
tools/perf/bench/mem-memcpy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/t
On Monday, January 12, 2015 11:39:18 AM Alan Stern wrote:
> On Mon, 12 Jan 2015, Rafael J. Wysocki wrote:
>
> > On Thursday, January 08, 2015 10:51:06 AM Alan Stern wrote:
> > > On Thu, 8 Jan 2015, Rafael J. Wysocki wrote:
> > >
> > > > From: Rafael J. Wysocki
> > > >
> > > > Commit f25c0ae2b4c
The count field is an unsigned 32bit value, and the
counter_show() function should also treat it as a unsigned
value.
Signed-off-by: Nan Li
---
drivers/acpi/sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/acpi/sysfs.c b/drivers/acpi/sysfs.c
index 13e577c..0876
On Wed, 7 Jan 2015, Jiang Liu wrote:
> Refine enable_IR_x2apic() and related functions for better readability.
>
> It also changes the way to handle IR in XAPIC mode when enabling X2APIC.
> Previously it just skips X2APIC initialization without checking max CPU
> APIC ID in system, which may caus
On 01/15/2015 09:58 AM, Christian Borntraeger wrote:
ACCESS_ONCE does not work reliably on non-scalar types. For
example gcc 4.6 and 4.7 might remove the volatile tag for such
accesses during the SRA (scalar replacement of aggregates) step
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58145)
Cha
Le 15/01/2015 10:11, Thomas Gleixner a écrit :
> On Wed, 14 Jan 2015, Rob Herring wrote:
>> On Wed, Jan 14, 2015 at 4:36 AM, Thomas Gleixner wrote:
>>> All attempts to work around that have resulted in horrible bandaids so
>>> far. That's why I guided Boris to implement this dummy demultiplexing
>
On Tue, Jan 13, 2015 at 11:33 AM, Brian Norris
wrote:
> On Thu, Dec 18, 2014 at 12:23:16AM -0800, vn...@altera.com wrote:
>> From: Viet Nga Dao
>>
>> Altera EPCQ Controller is a soft IP which enables access to Altera EPCQ and
>> EPCS flash chips. This patch adds driver for these devices.
>>
>> Si
On Wed, Jan 14, 2015 at 05:59:26PM -0800, Andy Lutomirski wrote:
> Hi Ingo and Thomas,
>
> At Linus' suggestion, I'm trying out some maintainerish stuff for x86
> entry code. Please consider pulling to an appropriate branch *after
> Paul sends his RCU pull request*, only if 734d16801349 is includ
On Wed 14-01-15 22:59:13, Davidlohr Bueso wrote:
> A quick search shows that there are no users, drop the
> macro for both jbd and jbd2.
>
> Signed-off-by: Davidlohr Bueso
> Cc: Jan Kara
Thanks. I've added the patch to my tree.
H
On 01/13/15 02:47, Paul Moore wrote:
> On Monday, January 12, 2015 09:11:21 AM Imre Palik wrote:
>> On 01/08/15 22:53, Paul Moore wrote:
>>> On Tuesday, January 06, 2015 03:51:20 PM Imre Palik wrote:
From: "Palik, Imre"
When file auditing is enabled, during a low memory situation, a
On Thu, 15 Jan 2015, Masami Hiramatsu wrote:
> Hmm, if this binary doesn't support IPMODIFY, it should return -ENOTSUPP.
Good poing, will send v3.
> And also, IMHO, we'd better reject registering ftrace_ops with IPMODIFY
> in this situation before updating hash table.
That would happen automat
On Thu, Jan 15, 2015 at 10:28:03AM +0100, Rafael J. Wysocki wrote:
> On Wednesday, January 14, 2015 08:32:12 AM Darren Hart wrote:
> >
> > On 1/14/15 4:58 AM, Linus Walleij wrote:
> > > On Thu, Dec 18, 2014 at 9:23 AM, Heikki Krogerus
> > > wrote:
> > >
> > >> This makes it possible to assign GP
Le 14/01/2015 23:55, Boris Brezillon a écrit :
> Hi Rob,
>
> On Wed, 14 Jan 2015 16:24:32 -0600
> Rob Herring wrote:
>
>> On Wed, Jan 14, 2015 at 4:36 AM, Thomas Gleixner wrote:
>>> On Tue, 13 Jan 2015, Rob Herring wrote:
On Tue, Jan 13, 2015 at 12:46 PM, Boris Brezillon
wrote:
>
Am 15.01.2015 um 00:02 schrieb Mike Turquette:
> Quoting Oleksij Rempel (2015-01-08 00:59:27)
>> diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
>> new file mode 100644
>> index 000..6b1c220
>> --- /dev/null
>> +++ b/drivers/clk/clk-asm9260.c
>
>
>
>> +static const char *c
On Mon, Dec 8, 2014 at 10:38 AM, Chang Rebecca Swee Fun
wrote:
> Consolidating similar algorithms into common functions to make
> GPIO SCH simpler and manageable.
>
> Signed-off-by: Chang Rebecca Swee Fun
> Reviewed-by: Mika Westerberg
> Reviewed-by: Alexandre Courbot
I have removed this patc
If ftrace doesn't claim to support IPMODIFY support, there is no need to
compile IPMODIFY support in kprobes either.
Suggested-by: Masami Hiramatsu
Acked-by: Masami Hiramatsu
Signed-off-by: Jiri Kosina
---
v1 -> v2: nothing
v2 -> v3: add Masami's ack and remove superfluous '== 1' comparsions
Using IPMODIFY needs to be allowed only with compilers which are
guaranteed to generate function prologues compatible with function
redirection through changing instruction pointer in saved regs.
For example changing regs->ip on x86_64 in cases when gcc is using mcount
(and not fentry) is not a
I'm announcing the release of the 3.12.36 kernel.
All users of the 3.12 kernel series must upgrade.
The updated 3.12.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.12.y
and can be browsed at the normal kernel.org git web browser:
The right debug AMBA bus name should be APB(Advanced Peripheral Bus),
so just fix it.
Signed-off-by: Kaixu Xia
---
Documentation/trace/coresight.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/trace/coresight.txt
b/Documentation/trace/coresight.txt
inde
On 15 January 2015 at 10:20, Krzysztof Kozlowski
wrote:
> On czw, 2015-01-15 at 09:20 +0100, Ulf Hansson wrote:
>> + Mike, Stephen (Clock maintainers)
>>
>> On 12 January 2015 at 10:23, Krzysztof Kozlowski
>> wrote:
>> > Hi,
>> >
>> >
>> > I would like to hear some comments about idea of scaling
Le 14/01/2015 23:20, Xander Huff a écrit :
> Put #define comments into a single line.
It seems that correction is not done for all the entries modified:
@ 0x0100 to 0x01b0
Can you please consider correcting this?
Thanks, bye.
> Signed-off-by: Xander Huff
> ---
> drivers/net/ethernet/cadence/m
This patch fix spelling typo found in Documentation/DocBook/80211.xml.
It is because this file was generated from comments in source,
I had to fix in include/net/mac80211.h
Signed-off-by: Masanari Iida
---
include/net/mac80211.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --g
PWER settings logically belongs neither to GPIO nor to system IRQ code.
Add special functions to handle PWER (for GPIO and for system IRQs)
from platform code.
Signed-off-by: Dmitry Eremin-Solenikov
---
arch/arm/mach-sa1100/generic.c | 21 +
1 file changed, 21 insertions(+)
Use new function controlling PWER register in IRQ driver.
Signed-off-by: Dmitry Eremin-Solenikov
---
arch/arm/mach-sa1100/irq.c | 12 +---
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 65aebfa..7a5aa56 100644
-
Add an irqchip driver for Intel StrongARM SA-11x0 family of chips. For
now it is just a copy of the current arch/arm/mach-sa1100/irq.c driver.
Signed-off-by: Dmitry Eremin-Solenikov
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sa11x0.c | 185 +
Use ioremap() and readl/writel_relaxed() to access IRQ controller
registers.
Signed-off-by: Dmitry Eremin-Solenikov
---
arch/arm/mach-sa1100/irq.c | 63 +-
1 file changed, 45 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-sa1100/irq.c b/arc
Drop irq driver for sa1100 in favour of irqchip driver replacement.
Signed-off-by: Dmitry Eremin-Solenikov
---
arch/arm/mach-sa1100/Makefile | 2 +-
arch/arm/mach-sa1100/generic.c | 13 +++
arch/arm/mach-sa1100/irq.c | 195 -
3 files changed, 14 in
On Thu, Jan 15, 2015 at 6:49 PM, Linus Walleij wrote:
> On Mon, Dec 8, 2014 at 10:38 AM, Chang Rebecca Swee Fun
> wrote:
>
>> Consolidating similar algorithms into common functions to make
>> GPIO SCH simpler and manageable.
>>
>> Signed-off-by: Chang Rebecca Swee Fun
>> Reviewed-by: Mika Wester
Add the SD_PREFER_SIBLING flag for SMT level in order to ensure that
the scheduler will put at least 1 task per core.
Signed-off-by: Vincent Guittot
Reviewed-by: Preeti U. Murthy
---
kernel/sched/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/sched/core.c b/kernel/sched/core.
Monitor the usage level of each group of each sched_domain level. The usage is
the portion of cpu_capacity_orig that is currently used on a CPU or group of
CPUs. We use the utilization_load_avg to evaluate the usage level of each
group.
The utilization_load_avg only takes into account the running
From: Morten Rasmussen
Apply frequency scale-invariance correction factor to usage tracking.
Each segment of the running_load_avg geometric series is now scaled by the
current frequency so the utilization_avg_contrib of each entity will be
invariant with frequency scaling. As a result, utilizatio
This patchset consolidates several changes in the capacity and the usage
tracking of the CPU. It provides a frequency invariant metric of the usage of
CPUs and generally improves the accuracy of load/usage tracking in the
scheduler. The frequency invariant metric is the foundation required for the
From: Morten Rasmussen
Adds usage contribution tracking for group entities. Unlike
se->avg.load_avg_contrib, se->avg.utilization_avg_contrib for group
entities is the sum of se->avg.utilization_avg_contrib for all entities on the
group runqueue. It is _not_ influenced in any way by the task group
On Mon, Jan 12, 2015 at 6:59 PM, Guenter Roeck wrote:
>> > Build failures, seen since next-20150109:
>> > m68k:allmodconfig
>> > powerpc:ppc6xx_defconfig
It looks like parisc is also suffering:
http://kisskb.ellerman.id.au/kisskb/buildresult/12343847/
>> > Due to:
>> > ER
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel
Signed-off-by: Paul Burton
---
V4 Reordered an error check. PTR_ERR inside IS_E
When a CPU is used to handle a lot of IRQs or some RT tasks, the remaining
capacity for CFS tasks can be significantly reduced. Once we detect such
situation by comparing cpu_capacity_orig and cpu_capacity, we trig an idle
load balance to check if it's worth moving its tasks on an idle CPU.
Once t
> > +_require_scratch
> > +_require_xfs_io_command "fiemap"
> > +_require_xfs_io_command "finsert"
> > +_require_xfs_io_command "fcollapse"
> > +_do_die_on_error=y
>
> What is _do_die_on_error for? Seems like that's only relevant for using
> _do()?
>
> > +src=$SCRATCH_MNT/testfile
> > +dest=$SCR
Hi Suman,
On Wed, Jan 14, 2015 at 10:58 PM, Suman Anna wrote:
> This is an updated version of the hwspinlock dt support series,
> rebased onto v3.19-rc3 and mainly addresses the continued discussion
> on the need to maintain a list of registered spinlock banks [1].
> I have removed this patch as
> > }
> > do_collapse_range(offset, size);
> > break;
> > + case OP_INSERT_RANGE:
> > + TRIM_OFF(offset, file_size);
> > + TRIM_LEN(offset, size, maxfilelen - file_size);
>
> Ugh, I hit a crash down in do_insert_range() due to the memset()
This new field cpu_capacity_orig reflects the original capacity of a CPU
before being altered by rt tasks and/or IRQ
The cpu_capacity_orig will be used:
- to detect when the capacity of a CPU has been noticeably reduced so we can
trig load balance to look for a CPU with better capacity. As an ex
The scheduler tries to compute how many tasks a group of CPUs can handle by
assuming that a task's load is SCHED_LOAD_SCALE and a CPU's capacity is
SCHED_CAPACITY_SCALE. group_capacity_factor divides the capacity of the group
by SCHED_LOAD_SCALE to estimate how many task can run in the group. Then,
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