于 2012年11月08日 12:01, Alex Dubov 写道:
Hi,
Do you have any comment on the MEMSTICK part in this v7 patchset? Can
you help to merge the patch to the kernel tree?
I'm afraid that presently I don't have much time to look at the memstick
related stuff any further. Hopefully, somebody else can step i
PAD is acpi Processor Aggregator Device which provides a control point
that enables the platform to perform specific processor configuration
and control that applies to all processors in the platform.
This patch is to implement Xen acpi pad logic. When running under Xen
virt platform, native pad d
With Xen acpi pad logic added into kernel, we can now revert xen mwait related
patch df88b2d96e36d9a9e325bfcd12eb45671cbbc937. The reason is, when running
under
newer Xen platform, Xen pad driver would be early loaded, so native pad driver
would fail to be loaded, and hence no mwait/monitor #UD ri
On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
> This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
> and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
> jump to the upper or lower cooling level instead of incremental increase
> or decrease.
On Thursday 08 November 2012 05:24:19 Linus Walleij wrote:
> I would prefer to create, e.g. in
> something like:
>
> struct gpio;
>
> struct gpio *gpio_get(struct device *dev, const char *name);
>
> int gpio_get_value(struct gpio *g);
>
> Nothing more! I.e. struct gpio is an opaque cookie, not
On 11/07/2012 08:51 AM, Andrew Morton wrote:
> On Tue, 23 Oct 2012 13:08:41 +0800
> Wei Yongjun wrote:
>
>> From: Wei Yongjun
>>
>> In case of error, the function test_init() need to call
>> platform_device_del() instead of platform_device_unregister().
>> Otherwise, we may call platform_device_p
On Thursday 08 November 2012 05:24:19 Linus Walleij wrote:
> On Tue, Nov 6, 2012 at 2:33 AM, Alex Courbot wrote:
> > How about, in a first time (and because I'd also like to get the power
> > seqs
> > moving on), a typedef from int to gpio_handle_t and a first implementation
> > of the gpio_handle
On 11/07/2012 11:10 PM, Kees Cook wrote:
> On Wed, Nov 7, 2012 at 1:32 AM, Theodore Ts'o wrote:
>> On Tue, Nov 06, 2012 at 05:11:17PM -0800, Kees Cook wrote:
>>> Hrm, I don't like this. get_random_int() specifically says: "Get a
>>> random word for internal kernel use only." The intent of AT_RANDO
Hi list,
IHAC reported "82571EB Detected Hardware Unit Hang" on HP ProLiant DL360 G6, and
have to reboot the server to recover:
e1000e :06:00.1: eth3: Detected Hardware Unit Hang:
TDH <1a>
TDT <1a>
next_to_use <1a>
next_to_clean<18>
b
On 8 November 2012 11:31, Zhang Rui wrote:
> On Thu, 2012-11-08 at 09:56 +0530, Amit Daniel Kachhap wrote:
>> This modification adds 2 new thermal trend type THERMAL_TREND_RAISE_FULL
>> and THERMAL_TREND_DROP_FULL. This thermal trend can be used to quickly
>> jump to the upper or lower cooling lev
Read the output value when gpio is set for the output mode for
gpio_get_value(). Reading input value in direction out does not
give correct value.
Signed-off-by: Laxman Dewangan
---
drivers/gpio/gpio-tegra.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gp
On 11/07/2012 11:25 PM, Mel Gorman wrote:
On Wed, Nov 07, 2012 at 05:27:12PM +0800, Zhouping Liu wrote:
Hello Mel,
my 2 nodes machine hit a panic fault after applied the patch
set(based on kernel-3.7.0-rc4), please review it:
Early initialisation problem by the looks of things. Try this plea
dmapool always calls dma_alloc_coherent() with GFP_ATOMIC flag, regardless
the flags provided by the caller. This causes excessive pruning of
emergency memory pools without any good reason. This patch changes the code
to correctly use gfp flags provided by the dmapool caller. This should
solve the
Dear Oleg,
Thanks for the patch, I tried it and it works nicely!
(except that I have no "include/uapi/" directory for
"include/uapi/linux/ptrace.h", so I applied that part
of the patch to "include/linux/ptrace.h" as well).
Also, I just noticed that this new option (PTRACE_O_EXITKILL) is not
safe
At Thu, 08 Nov 2012 01:42:59 +0100,
Daniel Mack wrote:
>
> On 07.11.2012 20:19, Takashi Iwai wrote:
> > At Wed, 7 Nov 2012 12:34:43 -0500 (EST),
> > Alan Stern wrote:
> >>
> >> On Mon, 5 Nov 2012, Christof Meerwald wrote:
> >>
> >>> BTW, I have been able to reproduce the problem on a completely
>
From: "G.Shark Jeong"
Fix coccinelle warning.
Signed-off-by: G.Shark Jeong
---
drivers/video/backlight/lm3639_bl.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/backlight/lm3639_bl.c
b/drivers/video/backlight/lm3639_bl.c
index 585949b..868a9da 10064
At Wed, 7 Nov 2012 15:37:17 -0500 (EST),
Alan Stern wrote:
>
> On Wed, 7 Nov 2012, Takashi Iwai wrote:
>
> > > What is the right solution for this problem?
> >
> > How about the patch below? (It's for 3.6, and won't be applied cleanly
> > to 3.7, but easy to adapt.)
>
> I simplified your patch
On 11/07/2012 04:53 PM, Sasha Levin wrote:
> On 11/01/2012 08:07 AM, Glauber Costa wrote:
>> SLUB allows us to tune a particular cache behavior with sysfs-based
>> tunables. When creating a new memcg cache copy, we'd like to preserve
>> any tunables the parent cache already had.
>>
>> This can be
mtd: check partition count not partition array pointer
The documentation claims that "nr_parts" is the determining factor,
while the code originally tested whether "parts" is non-null.
In at least one driver (fsl_elbc_nand), parts is never initialized to
0; even though nr_parts is correctly 0, a
Since commit 2139cbe627b8 ("cma: fix counting of isolated pages") free
pages in isolated pageblocks are not accounted to NR_FREE_PAGES counters,
so watermarks check is not required if one operates on a free page in
isolated pageblock.
Signed-off-by: Marek Szyprowski
---
mm/page_alloc.c | 10 ++
Commits 2139cbe627b89 ("cma: fix counting of isolated pages") and
d95ea5d18e69951 ("cma: fix watermark checking") introduced a reliable
method of free page accounting when memory is being allocated from CMA
regions, so the workaround introduced earlier by commit 49f223a9cd96c72
("mm: trigger page r
On 11/08/2012 02:39 PM, 杨竹 wrote:
> Hi all:
> I got a problem：
> 1. on intel cpu xeon E5000 family which support xapic ，one NIC
> irq can share on the CPUs basic on smp_affinity.
> 2. but on intel cpu xeon E5-2600 family which support x2apic, one
> NIC irq only on CPU
Convert to MT-B because Synaptics touch devices are capable
of tracking identifiable fingers.
Signed-off-by: Alexandra Chin
---
Changes from v5:
- Incorporated Henrik's review comments
*rollback to v3 from v4
*fix odd line break in v3
- Include Alexandra in the
On Thu, 08 Nov 2012 10:27:29 +0800, Axel Lin wrote:
> We call pinctrl_request_gpio() in request callback, thus we need to call
> pinctrl_free_gpio() in free callback.
>
> Both mvebu_gpio_request() and mvebu_gpio_free() are not referenced outside of
> this file, make them static.
Indeed, thanks.
On 7 November 2012 10:47, Vineet Gupta wrote:
> diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h
> new file mode 100644
> index 000..c178357
> --- /dev/null
> +++ b/arch/arc/include/asm/ptrace.h
> @@ -0,0 +1,120 @@
> +/* THE pt_regs: Defines how regs are saved during
On 11/07/2012 11:46 PM, Andrew Morton wrote:
> On Wed, 7 Nov 2012 10:22:17 +0100
> Glauber Costa wrote:
>
> container synchronously. If those objects are normally left floating
> around in an allocated but reclaimable state then we can address that
> by synchronously freeing them if
On 11/07/2012 06:50 PM, Grazvydas Ignotas wrote:
>> +static int twl4030_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
>> +{
>> + int ret;
>> + u8 val;
>> +
>> + ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, &val, TWL4030_GPBR1_REG);
>> + if (ret < 0) {
>> +
It's better to use more descriptive subjects on the patches.
This one could probably have been broken into smaller patches
[patch 4/x] Staging: winbond: wb35rx_s: fix white space
[patch 5/x] Staging: winbond: wb35rx_s: fix comments
[patch 6/x] Staging: winbond: wb35rx_s: allow header to be include
On 08.11.2012 07:43, Takashi Iwai wrote:
> At Thu, 08 Nov 2012 01:42:59 +0100,
> Daniel Mack wrote:
>>
>> On 07.11.2012 20:19, Takashi Iwai wrote:
>>> At Wed, 7 Nov 2012 12:34:43 -0500 (EST),
>>> Alan Stern wrote:
On Mon, 5 Nov 2012, Christof Meerwald wrote:
> BTW, I have been ab
On 11/07/2012 07:12 PM, Grazvydas Ignotas wrote:
>> +static int twl4030_pwmled_config(struct pwm_chip *chip, struct pwm_device
>> *pwm,
>> + int duty_ns, int period_ns)
>> +{
>> + int duty_cycle = (duty_ns * TWL4030_LED_MAX) / period_ns;
>> + u8 on_time;
>>
In AM33xx PWM sub modules like ECAP, EHRPWM & EQEP are integrated to
PWM subsystem. All these submodules shares the resources (clock) & has
a clock gating register in PWM Subsystem. This patch series creates a
parent PWM Subsystem driver to handle access synchronization of shared
resources & clock
In some platforms (like am33xx), PWM sub modules (ECAP, EHRPWM, EQEP)
are integrated to PWM subsystem. These PWM submodules has resources
shared and only one register bit-field is provided to control
module/clock enable/disable, makes it difficult to handle common
resources from independent PWMSS s
EHRPWM module requires explicit clock gating from control module.
Hence add clock node in clock tree for EHRPWM modules.
Signed-off-by: Philip, Avinash
---
:100644 100644 17e3de5... 833260f... M arch/arm/mach-omap2/clock33xx_data.c
:100644 100644 a89e825... c0e34e6... M arch/arm/mach-omap2/cont
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP & EHRPWM).
To handle resource sharing & IP integration
1. Rework on parent child relation between PWMSS and
ECAP, EQEP & EHRPWM child devices to support runtime PM.
2. Add support f
This patch
1. Add support for device-tree binding for ECAP APWM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period & polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member i
Enable pinctrl for pwm-tiecap
Signed-off-by: Philip, Avinash
---
:100644 100644 0d43266... 6071f7a... M drivers/pwm/pwm-tiecap.c
drivers/pwm/pwm-tiecap.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index 0d432
This patch
1. Add support for device-tree binding for EHRWPM driver.
2. Set size of pwm-cells set to 3 to support PWM channel number, PWM
period & polarity configuration from device tree.
3. Add enable/disable clock gating in PWM subsystem common config space.
4. When here set .owner member in p
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