On Fri, 2013-10-11 at 08:52 +0200, Geert Uytterhoeven wrote:
> > Not sure what you mean create a linux bus type with devices on
> > it ?
>
> Yes, that's what I meant.
>
> >From the nodes on that bus you can have symlinks in sysfs to e.g. the CPUs
> in the rest of the sysfs tree.
>
> It's a
On Thu, Oct 10, 2013 at 11:30 PM, Benjamin Herrenschmidt
wrote:
> On Thu, 2013-10-10 at 22:26 +0200, Geert Uytterhoeven wrote:
>> > This is not CPUs. CPUs are threads really. Even if they were cores,
>> that
>> > still wouldn't cut it. I'm looking at chips here and not all of them
>> > actually pr
On Thu, 2013-10-10 at 22:26 +0200, Geert Uytterhoeven wrote:
> > This is not CPUs. CPUs are threads really. Even if they were cores,
> that
> > still wouldn't cut it. I'm looking at chips here and not all of them
> > actually processor chips. The SCOM bus address space is global to a
> > physical c
On Thu, Oct 10, 2013 at 10:01 PM, Benjamin Herrenschmidt
wrote:
>> > Among other, I want a sysfs file in there to access "xscom" on the chip
>> > which is a sideband bus used for low level stuff (think jtag on steroid)
>> > which we can use, among others, for chip health monitoring, general
>> > d
On Thu, 2013-10-10 at 10:44 -0700, Greg KH wrote:
> On Thu, Oct 10, 2013 at 03:19:48PM +1100, Benjamin Herrenschmidt wrote:
> > Hi Greg !
> >
> > (random CC list of clueful people)
> >
> > On some new powerpc platforms (non-hypervisor or rather linux is the
> > hypervisor), I want to expose a bun
On Thu, Oct 10, 2013 at 03:19:48PM +1100, Benjamin Herrenschmidt wrote:
> Hi Greg !
>
> (random CC list of clueful people)
>
> On some new powerpc platforms (non-hypervisor or rather linux is the
> hypervisor), I want to expose a bunch of stuff per "chip", the chips
> being currently the processo
Hi Greg !
(random CC list of clueful people)
On some new powerpc platforms (non-hypervisor or rather linux is the
hypervisor), I want to expose a bunch of stuff per "chip", the chips
being currently the processor chips and the "centaurs" (think of them as
the bottom half of the memory controllers
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