RE: fb driver for logiCVC

2013-05-16 Thread Davor Joja
Subject: Re: fb driver for logiCVC On Thu, May 16, 2013 at 12:35 PM, Davor Joja wrote: > Unfortunately, I have this driver on mentioned git only for few weeks, so > there is no usable history. > Since this is new driver, tested and functional (on kernel 3.8), without git > history as

Re: fb driver for logiCVC

2013-05-16 Thread Geert Uytterhoeven
On Thu, May 16, 2013 at 12:35 PM, Davor Joja wrote: > Unfortunately, I have this driver on mentioned git only for few weeks, so > there is no usable history. > Since this is new driver, tested and functional (on kernel 3.8), without git > history as stated above, do you have idea how to break it

RE: fb driver for logiCVC

2013-05-16 Thread Davor Joja
-Original Message- From: Bruno Prémont [mailto:bonb...@linux-vserver.org] Sent: Wednesday, May 15, 2013 6:41 PM To: Davor Joja Cc: linux-kernel@vger.kernel.org; linux-fb...@vger.kernel.org Subject: Re: fb driver for logiCVC Hello Davor, On Tue, 14 May 2013 "Davor Joja" wrote: &

Re: fb driver for logiCVC

2013-05-15 Thread Bruno Prémont
Hello Davor, On Tue, 14 May 2013 "Davor Joja" wrote: > Can I get suggestion how to send driver to this list which consists of > several files and folders, as one (big) patch or as described in > "how-to" as link to some ftp or git? > My previous mail has not been replied, because of link to driver

fb driver for logiCVC

2013-05-14 Thread Davor Joja
Hello, Can I get suggestion how to send driver to this list which consists of several files and folders, as one (big) patch or as described in "how-to" as link to some ftp or git? My previous mail has not been replied, because of link to driver or other issue (tested on kernel 3.8)? Thanks! Rega

fb driver for logiCVC

2013-05-08 Thread Davor Joja
Hello, I am sending link to frame buffer driver for Xylon "logiCVC" FPGA IP core, so I would kindly ask for driver review. logiCVC is Configurable Video Controller developed for Xilinx FPGA devices. logiCVC device together with xylonfb driver is widely used in Xilinx Targeted Referent Designs on Z