On Jul 9 2007 22:54, Pawel Dziepak wrote:
> As far as i know Pentium M processors have dynamically changed clock
> speed (ofc to save power). That's why kernel notice that TSC is
> unstable (it is indeed). On my Athlon 64 I have similar situation,
> because CPU frequency is dynamically changed.
>
Now that you mention it - I am seeing something similar with
kernel 2.6.22 on an Intel Pentium D 940 dual core processor
(arbitrary selection of dmesg lines that appeared relevant):
<5>[0.00] Linux version 2.6.22-testing ([EMAIL PROTECTED]) (gcc version
4.1.2 20061115 (prerelease) (SUSE L
As far as i know Pentium M processors have dynamically changed clock
speed (ofc to save power). That's why kernel notice that TSC is
unstable (it is indeed). On my Athlon 64 I have similar situation,
because CPU frequency is dynamically changed.
I don't think that there is an easy way to fix it (i
Arnaldo Carvalho de Melo escreveu:
Renato S. Yamane wrote:
On Kernel 2.6.21.6 I see this message in dmesg:
Clocksource tsc unstable (delta = 732182695 ns)
It's normal?
AMD CPU? SMP? Details, please.
Oh, sorry!
cat /proc/cpuinfo
processor : 0
vendor_id : GenuineIntel
cpu family
On Monday 09 of July 2007, Arnaldo Carvalho de Melo wrote:
> Renato S. Yamane wrote:
> > On Kernel 2.6.21.6 I see this message in dmesg:
> > Clocksource tsc unstable (delta = 732182695 ns)
> >
> > It's normal?
>
> AMD CPU? SMP? Details, please.
Here (after resume from ram btw):
[ 10.726665] Mark
Renato S. Yamane wrote:
On Kernel 2.6.21.6 I see this message in dmesg:
Clocksource tsc unstable (delta = 732182695 ns)
It's normal?
AMD CPU? SMP? Details, please.
- Arnaldo
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