Re: PCI resource unavailable on mips

2007-12-18 Thread Jon Dufresne
> > Bar0:PHYS=e000 LEN=0400 > > Bar1:PHYS=efa0 LEN=0020 > > Bar2:PHYS=e800 LEN=0400 > > So, two 64MB BARs and a 2MB one? That is right. > Any PCI resource allocation errors in dmesg during the boot process? > Could be the kernel wasn't able to find a place to map all of

Re: PCI resource unavailable on mips

2007-12-18 Thread Jon Dufresne
> Your example doesn't make sense to me so far. Ok, I simplified my driver down to one small C file that does exactly what I want, and that is it. Below is my driver under "driver.c" and the user space program I am using to access it under "user-test.c". When I insmod this driver under mips,

Re: PCI resource unavailable on mips

2007-12-17 Thread Sergei Shtylyov
Hello. Jon Dufresne wrote: I did a bit more work and investigation on this and it turns out I could not read the mmio in kernel space because I had not done a pci_enable_device_bars() on the device. I had never done this on x86 so I didn't realize it was necessary. The virtual address 0xc030

Re: PCI resource unavailable on mips

2007-12-17 Thread Jon Dufresne
I did a bit more work and investigation on this and it turns out I could not read the mmio in kernel space because I had not done a pci_enable_device_bars() on the device. I had never done this on x86 so I didn't realize it was necessary. > The virtual address 0xc030 looks sensible and the phy

Re: PCI resource unavailable on mips

2007-12-16 Thread Ralf Baechle
On Fri, Dec 14, 2007 at 04:12:15PM -0500, Jon Dufresne wrote: > Hmm, I found more strange behavior with the bars that may or may not be > related. I wrote a function that does another sanity check. It does an > ioremap on one of the working bars, then reads one address for > correctness. This is j

Re: PCI resource unavailable on mips

2007-12-14 Thread Jon Dufresne
> Odd. I knew the resource allocation stuff has it's issues for some > non-trivial configuration but that one is a new one. Which makes me > wonder if your platform runs the PCI code in probe-only mode where it > will not actually assign resources but only inherit the whole PCI setup > except in

Re: PCI resource unavailable on mips

2007-12-14 Thread Jon Dufresne
> > Odd. I knew the resource allocation stuff has it's issues for some > non-trivial configuration but that one is a new one. Which makes me > wonder if your platform runs the PCI code in probe-only mode where it > will not actually assign resources but only inherit the whole PCI setup > except

Re: PCI resource unavailable on mips

2007-12-14 Thread Ralf Baechle
On Thu, Dec 13, 2007 at 09:56:46AM -0500, Jon Dufresne wrote: > I've done a bit of linux driver development on x86 in the past. > Currently I am working on my first ever linux driver for a mips box. I > started by testing the device in an x86 box and got it reasonable stable > and am now testing i

Re: PCI resource unavailable on mips

2007-12-13 Thread Robert Hancock
Jon Dufresne wrote: Hi, I've done a bit of linux driver development on x86 in the past. Currently I am working on my first ever linux driver for a mips box. I started by testing the device in an x86 box and got it reasonable stable and am now testing it in the mips box. There appears to be a maj