Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-03 Thread Meelis Roos
> That's the entry area, which is mapped into kernel _AND_ user space. Now > that's special because we switch CR3 while we are executing there. > > And this one is: > > 0x81e0-0x8200 2M ro PSE GLB > x pmd > > and the one we switch to is: > > 0

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-03 Thread Thomas Gleixner
On Wed, 3 Jan 2018, Borislav Petkov wrote: > On Wed, Jan 03, 2018 at 11:16:48AM +0200, Meelis Roos wrote: > > ---[ ESPfix Area ]--- > > 0xff00-0xff18 96G > > pud > > 0xff18-0xff189000 36K

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-03 Thread Borislav Petkov
On Wed, Jan 03, 2018 at 11:16:48AM +0200, Meelis Roos wrote: > ---[ ESPfix Area ]--- > 0xff00-0xff18 96G >pud > 0xff18-0xff189000 36K >pte > 0xff189000-0xff18000

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-03 Thread Meelis Roos
> > > [ 316.384669] mce: [Hardware Error]: Machine check events logged > > > [ 316.384698] [Hardware Error]: Corrected error, no action required. > > > [ 316.384719] [Hardware Error]: CPU:0 (f:2f:2) > > > MC1_STATUS[-|CE|-|-|AddrV]: 0x94010011 > > > [ 316.384742] [Hardware Error]: Erro

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-02 Thread Meelis Roos
> > These MCE-s do not happen on 4.14 and 4.15.0-rc4-00041-gace52288edf0. > > They do happen on each boot into 4.15-rc6. Will try to bisect. > > Please do. And try -rc5 too. 4.15-rc5 is OK. Will try CONFIG_X86_PTDUMP on the next kernel. > And then Linus' pti merges: > > 52c90f2d32bfa7d6eccd66

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-02 Thread Thomas Gleixner
On Tue, 2 Jan 2018, Borislav Petkov wrote: > On Tue, Jan 02, 2018 at 10:49:16PM +0200, Meelis Roos wrote: > > This is on a socket 939 Athlon64 3500+, with PTI enabled. > > LOL. > > > [ 316.384669] mce: [Hardware Error]: Machine check events logged > > [ 316.384698] [Hardware Error]: Corrected e

Re: 4.15-rc6 PTI regression: L1 TLB mismatch MCE on Athlon64

2018-01-02 Thread Borislav Petkov
On Tue, Jan 02, 2018 at 10:49:16PM +0200, Meelis Roos wrote: > This is on a socket 939 Athlon64 3500+, with PTI enabled. LOL. > [ 316.384669] mce: [Hardware Error]: Machine check events logged > [ 316.384698] [Hardware Error]: Corrected error, no action required. > [ 316.384719] [Hardware Erro