Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-11 Thread David Wragg
Steven Walter <[EMAIL PROTECTED]> writes: > On Sun, Dec 10, 2000 at 06:20:31PM +, David Wragg wrote: > > If I understood why the MTRR driver was doing something on the K6-2, > > then model-specific differences might make some sense. But currently, > > I don't see why there would be any differ

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-10 Thread Julian Anastasov
Hello, On Sun, 10 Dec 2000, Victor J. Orlikowski wrote: > You appear to be right, sir. > The SVGA xserver was what I was using. Changing over to use the S3 > server, and then adding back in MTRRs, seems to have solved the Hm, I have to see whether GX2 works with the S3V server.

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-10 Thread Victor J. Orlikowski
You appear to be right, sir. The SVGA xserver was what I was using. Changing over to use the S3 server, and then adding back in MTRRs, seems to have solved the trouble. I'll let you know if it returns, but for now, all appears well. Victor -- Victor J. Orlikowski == [EMAIL PR

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-10 Thread Julian Anastasov
Hello, On Sat, 9 Dec 2000, Victor J. Orlikowski wrote: > After doing some googling > It would appear that, in Family 5, Model 8, Stepping 12 of the K6-2, > AMD used a different CPU core, that was more similar to the K6-3, and > that there is a slightly odd way of doing write-combini

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-10 Thread Steven Walter
On Sun, Dec 10, 2000 at 06:20:31PM +, David Wragg wrote: > If I understood why the MTRR driver was doing something on the K6-2, > then model-specific differences might make some sense. But currently, > I don't see why there would be any difference between "MTRR disabled" > and "MTRR enabled,

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-10 Thread David Wragg
"Victor J. Orlikowski" <[EMAIL PROTECTED]> writes: > This is precisely my problem. > K6-2, model 8, stepping 12. > Thus far, everything is *fine*, as long as MTRR is not compiled into > the kernel. > If MTRR is compiled into the kernel, I get lock-ups in X *only*, and > the entire machine locks.

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-09 Thread Victor J. Orlikowski
After doing some googling It would appear that, in Family 5, Model 8, Stepping 12 of the K6-2, AMD used a different CPU core, that was more similar to the K6-3, and that there is a slightly odd way of doing write-combining. Perhaps this is the problem? Anyone with more knowledge on the AMD co

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-09 Thread Victor J. Orlikowski
This is precisely my problem. K6-2, model 8, stepping 12. Thus far, everything is *fine*, as long as MTRR is not compiled into the kernel. If MTRR is compiled into the kernel, I get lock-ups in X *only*, and the entire machine locks. I have no data on other CPUs; as I said, I previously had a P166

Re: 2.2.18pre25, S3, AMD K6-2, and MTRR....

2000-12-09 Thread Julian Anastasov
Hello, On Sat, 9 Dec 2000, Victor J. Orlikowski wrote: > However, in X I get *random* lock-ups (sometimes when gdm > starts, sometimes when using gmc, etc.) > Disabling MTRR seems to have cured the problem, for now (I > haven't *seen* anything random *yet*; I'll