Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Julian Calaby
Hi Finn, On Sat, Dec 5, 2015 at 1:12 PM, Finn Thain wrote: > > On Sat, 5 Dec 2015, Julian Calaby wrote: > >> Hi Finn, >> >> On Fri, Dec 4, 2015 at 7:38 PM, Finn Thain >> wrote: >> > >> > On Fri, 4 Dec 2015, Julian Calaby wrote: >> > >> >> > - if (overrides[current_override].board

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Finn Thain
On Sat, 5 Dec 2015, Julian Calaby wrote: > Hi Finn, > > On Fri, Dec 4, 2015 at 7:38 PM, Finn Thain wrote: > > > > On Fri, 4 Dec 2015, Julian Calaby wrote: > > > >> > - if (overrides[current_override].board == > >> > BOARD_NCR53C400A) { > >> > + if (overrides[current

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Julian Calaby
Hi Finn, On Fri, Dec 4, 2015 at 7:38 PM, Finn Thain wrote: > > On Fri, 4 Dec 2015, Julian Calaby wrote: > >> > - if (overrides[current_override].board == BOARD_NCR53C400A) >> > { >> > + if (overrides[current_override].board == BOARD_NCR53C400A >> > || >> > +

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Ondrej Zary
On Friday 04 December 2015, Finn Thain wrote: > > On Fri, 4 Dec 2015, Ondrej Zary wrote: > > > Add I/O register mapping for DTC chips and enable PDMA mode. > > > > These chips have 16-bit wide HOST BUFFER register (counter register at > > offset 0x0d increments by 2 on each HOST BUFFER read). >

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Finn Thain
On Fri, 4 Dec 2015, Ondrej Zary wrote: > @@ -685,8 +684,10 @@ static inline int NCR5380_pwrite(struct Scsi_Host > *instance, unsigned char *src, > /* All documentation says to check for this. Maybe my hardware is too >* fast. Waiting for it seems to work fine! KLL >*/ > -

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Finn Thain
On Fri, 4 Dec 2015, Ondrej Zary wrote: > Add I/O register mapping for DTC chips and enable PDMA mode. > > These chips have 16-bit wide HOST BUFFER register (counter register at > offset 0x0d increments by 2 on each HOST BUFFER read). > > Large PIO transfers crash at least the DTCT-436P chip (a

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-04 Thread Finn Thain
On Fri, 4 Dec 2015, Julian Calaby wrote: > > - if (overrides[current_override].board == BOARD_NCR53C400A) { > > + if (overrides[current_override].board == BOARD_NCR53C400A || > > + overrides[current_override].board == BOARD_DTC3181E) { > > These if s

Re: [RFC PATCH 76/71] ncr5380: Enable PDMA for DTC chips

2015-12-03 Thread Julian Calaby
Hi Finn, Ondrej, One small question: On Fri, Dec 4, 2015 at 10:03 AM, Ondrej Zary wrote: > Add I/O register mapping for DTC chips and enable PDMA mode. > > These chips have 16-bit wide HOST BUFFER register (counter register at > offset 0x0d increments by 2 on each HOST BUFFER read). > > Large PI