On Tue, Dec 22, 2020 at 3:55 PM Vitaly Wool wrote:
>
> Hi Anup,
>
> On Tue, Dec 22, 2020 at 6:16 AM Anup Patel wrote:
> >
> > On Tue, Dec 22, 2020 at 2:08 AM Vitaly Wool
> > wrote:
> > >
> > > Introduce XIP (eXecute In Place) support for RISC-V platforms.
> > > It allows code to be executed dir
Hi Anup,
On Tue, Dec 22, 2020 at 6:16 AM Anup Patel wrote:
>
> On Tue, Dec 22, 2020 at 2:08 AM Vitaly Wool wrote:
> >
> > Introduce XIP (eXecute In Place) support for RISC-V platforms.
> > It allows code to be executed directly from non-volatile storage
> > directly addressable by the CPU, such
On Tue, Dec 22, 2020 at 2:44 AM Bin Meng wrote:
>
> Hi Vitaly,
>
> On Tue, Dec 22, 2020 at 4:39 AM Vitaly Wool wrote:
> >
> > Introduce XIP (eXecute In Place) support for RISC-V platforms.
> > It allows code to be executed directly from non-volatile storage
> > directly addressable by the CPU, su
On Tue, Dec 22, 2020 at 2:08 AM Vitaly Wool wrote:
>
> Introduce XIP (eXecute In Place) support for RISC-V platforms.
> It allows code to be executed directly from non-volatile storage
> directly addressable by the CPU, such as QSPI NOR flash which can
> be found on many RISC-V platforms. This mak
Hi Vitaly,
On Tue, Dec 22, 2020 at 4:39 AM Vitaly Wool wrote:
>
> Introduce XIP (eXecute In Place) support for RISC-V platforms.
> It allows code to be executed directly from non-volatile storage
> directly addressable by the CPU, such as QSPI NOR flash which can
> be found on many RISC-V platfor
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