On Wed, Apr 14, 2021 at 12:09:50PM -0700, matthew.gerl...@linux.intel.com wrote:
> On Wed, 14 Apr 2021, Mark Brown wrote:
> > Don't create a platform device here, extend the spi-altera driver to
> > register with both DFL and platform buses.
> Are you suggesting something like the SPI driver for
On Wed, 14 Apr 2021, Mark Brown wrote:
On Tue, Apr 13, 2021 at 03:58:34PM -0700, matthew.gerl...@linux.intel.com wrote:
+++ b/drivers/spi/spi-altera-dfl.c
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DFL bus driver for Altera SPI Master
+ *
Please make the entire comment
On 4/13/21 3:58 PM, matthew.gerl...@linux.intel.com wrote:
From: Matthew Gerlach
This patch adds a Device Feature List (DFL) bus driver for the
Altera SPI Master controller. The SPI master is connected to an
Intel SPI Slave to Avalon Master Bridge inside an Intel MAX10
BMC Chip.
Signed-off-
On Tue, Apr 13, 2021 at 03:58:34PM -0700, matthew.gerl...@linux.intel.com wrote:
> +++ b/drivers/spi/spi-altera-dfl.c
> @@ -0,0 +1,222 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * DFL bus driver for Altera SPI Master
> + *
Please make the entire comment a C++ one so things look more
inte
4 matches
Mail list logo