Re: [PATCH v2 0/3] powernv/cpuidle: Fastsleep workaround and fixes

2014-10-02 Thread Shreyas B Prabhu
On Thursday 02 October 2014 02:16 AM, Rafael J. Wysocki wrote: > On Wednesday, October 01, 2014 01:15:57 PM Shreyas B. Prabhu wrote: >> Fast sleep is an idle state, where the core and the L1 and L2 >> caches are brought down to a threshold voltage. This also means that >> the communication betwee

Re: [PATCH v2 0/3] powernv/cpuidle: Fastsleep workaround and fixes

2014-10-01 Thread Rafael J. Wysocki
On Wednesday, October 01, 2014 01:15:57 PM Shreyas B. Prabhu wrote: > Fast sleep is an idle state, where the core and the L1 and L2 > caches are brought down to a threshold voltage. This also means that > the communication between L2 and L3 caches have to be fenced. However > the current P8 chips h