Re: [PATCH v2] net/macb: fix ISR clear-on-write behavior only for some SoC

2013-05-14 Thread David Miller
From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 14 May 2013 18:24:50 +0200 > On 15:00 Tue 14 May , Nicolas Ferre wrote: >> Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR) >> introduces clear-on-write on ISR register. This behavior is not always >> implemented when using Caden

Re: [PATCH v2] net/macb: fix ISR clear-on-write behavior only for some SoC

2013-05-14 Thread Jean-Christophe PLAGNIOL-VILLARD
On 15:00 Tue 14 May , Nicolas Ferre wrote: > Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR) > introduces clear-on-write on ISR register. This behavior is not always > implemented when using Cadence MACB/GEM and is breaking other platforms. > We are using the Design Configuration

Re: [PATCH v2] net/macb: fix ISR clear-on-write behavior only for some SoC

2013-05-14 Thread Hein Tibosch
Hi Nicolas, On 5/14/2013 9:00 PM, Nicolas Ferre wrote: > Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR) > introduces clear-on-write on ISR register. This behavior is not always > implemented when using Cadence MACB/GEM and is breaking other platforms. > We are using the Design Conf