On Fri, 2018-09-21 at 15:30 -0700, Brendan Higgins wrote:
> On Fri, Sep 21, 2018 at 3:26 PM Jae Hyun Yoo
[]
> > > + dev_err(dev,
> > > + "clamping clock divider: divider requested, %u, is
> > > greater than largest possible divider, %u.",
> >
> > Please put a newli
On Fri, Sep 21, 2018 at 3:26 PM Jae Hyun Yoo
wrote:
>
>
> > + if (base_clk_divisor > ASPEED_I2CD_TIME_BASE_DIVISOR_MASK) {
> > + base_clk_divisor = ASPEED_I2CD_TIME_BASE_DIVISOR_MASK;
> > + clk_low = clk_high_low_mask;
> > + clk_high = clk_high_low_mask;
>
Hi,
On 9/21/2018 3:10 PM, Brendan Higgins wrote:
The function that computes clock parameters from divisors did not
respect the maximum size of the bitfields that the parameters were
written to. This fixes the bug.
This bug can be reproduced with (and this fix verified with) the test
at: https:/
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