On 09/06/16 23:56, Kevin Hilman wrote:
> Jon Hunter writes:
>
>> On 06/06/16 15:36, Grygorii Strashko wrote:
>>> On 06/06/2016 05:30 PM, Jon Hunter wrote:
On 06/06/16 15:13, Grygorii Strashko wrote:
> On 06/06/2016 02:53 PM, Jon Hunter wrote:
>> Some IRQ chips may be located in
Jon Hunter writes:
> On 06/06/16 15:36, Grygorii Strashko wrote:
>> On 06/06/2016 05:30 PM, Jon Hunter wrote:
>>>
>>> On 06/06/16 15:13, Grygorii Strashko wrote:
On 06/06/2016 02:53 PM, Jon Hunter wrote:
> Some IRQ chips may be located in a power domain outside of the CPU
> subsystem
On 06/06/16 16:06, Jon Hunter wrote:
>
> On 06/06/16 15:36, Grygorii Strashko wrote:
>> On 06/06/2016 05:30 PM, Jon Hunter wrote:
>>>
>>> On 06/06/16 15:13, Grygorii Strashko wrote:
On 06/06/2016 02:53 PM, Jon Hunter wrote:
> Some IRQ chips may be located in a power domain outside of the
On 06/06/16 15:36, Grygorii Strashko wrote:
> On 06/06/2016 05:30 PM, Jon Hunter wrote:
>>
>> On 06/06/16 15:13, Grygorii Strashko wrote:
>>> On 06/06/2016 02:53 PM, Jon Hunter wrote:
Some IRQ chips may be located in a power domain outside of the CPU
subsystem and hence will require devi
On 06/06/2016 05:30 PM, Jon Hunter wrote:
>
> On 06/06/16 15:13, Grygorii Strashko wrote:
>> On 06/06/2016 02:53 PM, Jon Hunter wrote:
>>> Some IRQ chips may be located in a power domain outside of the CPU
>>> subsystem and hence will require device specific runtime power
>>> management. In order
On 06/06/16 15:13, Grygorii Strashko wrote:
> On 06/06/2016 02:53 PM, Jon Hunter wrote:
>> Some IRQ chips may be located in a power domain outside of the CPU
>> subsystem and hence will require device specific runtime power
>> management. In order to support such IRQ chips, add a pointer for a
>>
On 06/06/2016 02:53 PM, Jon Hunter wrote:
> Some IRQ chips may be located in a power domain outside of the CPU
> subsystem and hence will require device specific runtime power
> management. In order to support such IRQ chips, add a pointer for a
> device structure to the irq_chip structure, and if
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