Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread James Hogan
Hi Andrew, On Wed, Oct 29, 2014 at 10:25:27AM -0700, Andrew Bresticker wrote: > On Wed, Oct 29, 2014 at 10:13 AM, James Hogan wrote: > > On 29/10/14 16:55, Andrew Bresticker wrote: > >> On Wed, Oct 29, 2014 at 2:21 AM, James Hogan > >> wrote: > >>> Please lets not do this unless it's actually n

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Mark Rutland
On Wed, Oct 29, 2014 at 04:55:56PM +, Andrew Bresticker wrote: > Hi James, > > On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote: > > Hi Andrew, > > > > On 29/10/14 00:12, Andrew Bresticker wrote: > >> - changed compatible string to include CPU version > > > >> +Required properties: > >> +-

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Mark Rutland
On Wed, Oct 29, 2014 at 05:23:59PM +, Qais Yousef wrote: > On 10/29/2014 05:08 PM, Andrew Bresticker wrote: > > On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote: > >> On 10/29/2014 12:12 AM, Andrew Bresticker wrote: > >>> +- reg : Base address and length of the GIC registers. > >>> > >> Also

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Andrew Bresticker
On Wed, Oct 29, 2014 at 10:13 AM, James Hogan wrote: > On 29/10/14 16:55, Andrew Bresticker wrote: >> Hi James, >> >> On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote: >>> Hi Andrew, >>> >>> On 29/10/14 00:12, Andrew Bresticker wrote: - changed compatible string to include CPU version >>>

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Qais Yousef
On 10/29/2014 05:08 PM, Andrew Bresticker wrote: On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote: On 10/29/2014 12:12 AM, Andrew Bresticker wrote: +- reg : Base address and length of the GIC registers. Also except for sead3, the base address should be properly reported by the hardware. Th

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread James Hogan
On 29/10/14 16:55, Andrew Bresticker wrote: > Hi James, > > On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote: >> Hi Andrew, >> >> On 29/10/14 00:12, Andrew Bresticker wrote: >>> - changed compatible string to include CPU version >> >>> +Required properties: >>> +- compatible : Should be "mti,-

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Andrew Bresticker
On Wed, Oct 29, 2014 at 4:09 AM, Qais Yousef wrote: > On 10/29/2014 12:12 AM, Andrew Bresticker wrote: >> >> +- reg : Base address and length of the GIC registers. >> > > Also except for sead3, the base address should be properly reported by the > hardware. The size is fixed (for a specific versio

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Qais Yousef
On 10/29/2014 04:56 PM, Andrew Bresticker wrote: On Wed, Oct 29, 2014 at 4:01 AM, Qais Yousef wrote: On 10/29/2014 12:12 AM, Andrew Bresticker wrote: +- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors + to which the GIC may route interrupts. May contain up to 6 entrie

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Andrew Bresticker
On Wed, Oct 29, 2014 at 4:01 AM, Qais Yousef wrote: > On 10/29/2014 12:12 AM, Andrew Bresticker wrote: >> >> +- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors >> + to which the GIC may route interrupts. May contain up to 6 entries, >> one >> + for each of the CPU's hard

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Andrew Bresticker
Hi James, On Wed, Oct 29, 2014 at 2:21 AM, James Hogan wrote: > Hi Andrew, > > On 29/10/14 00:12, Andrew Bresticker wrote: >> - changed compatible string to include CPU version > >> +Required properties: >> +- compatible : Should be "mti,-gic". Supported variants: >> + - "mti,interaptiv-gic" >

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Qais Yousef
On 10/29/2014 12:12 AM, Andrew Bresticker wrote: +- reg : Base address and length of the GIC registers. Also except for sead3, the base address should be properly reported by the hardware. The size is fixed (for a specific version of GIC at least - which is also reported by the hardware). So

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread Qais Yousef
On 10/29/2014 12:12 AM, Andrew Bresticker wrote: +- mti,available-cpu-vectors : Specifies the list of CPU interrupt vectors + to which the GIC may route interrupts. May contain up to 6 entries, one + for each of the CPU's hardware interrupt vectors. Valid values are 2 - 7. + This property is

Re: [PATCH V3 2/4] of: Add binding document for MIPS GIC

2014-10-29 Thread James Hogan
Hi Andrew, On 29/10/14 00:12, Andrew Bresticker wrote: > - changed compatible string to include CPU version > +Required properties: > +- compatible : Should be "mti,-gic". Supported variants: > + - "mti,interaptiv-gic" > +Required properties for timer sub-node: > +- compatible : Should be "mt