Re: [PATCH V2 07/19] csky: MMU and page table management

2018-07-02 Thread Guo Ren
On Mon, Jul 02, 2018 at 06:29:15AM -0700, Christoph Hellwig wrote: > This commit is missing an explanation. The patch is for abiv1 & abiv2 CPU series' MMU support. - abiv1 CPU (CK610) is VIPT cache and it doesn't support highmem. - abiv2 CPUs are all PIPT cache and they could support highmem.

Re: [PATCH V2 07/19] csky: MMU and page table management

2018-07-02 Thread Christoph Hellwig
This commit is missing an explanation. For the dma-mapping code please use the generic kernel/dma/noncoherent.c code instead of duplicating it.