On Thu, Jun 27, 2013 at 9:00 AM, Bjorn Helgaas wrote:
> On Wed, Jun 26, 2013 at 5:56 PM, Yinghai Lu wrote:
>> On Wed, Jun 26, 2013 at 3:55 PM, Bjorn Helgaas wrote:
>>> On Wed, Jun 26, 2013 at 4:31 PM, Yinghai Lu wrote:
On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
> On Wed, Jun 2
On Thu, Jun 27, 2013 at 9:27 AM, Mika Westerberg
wrote:
> On Thu, Jun 27, 2013 at 04:54:05PM +0300, Mika Westerberg wrote:
>> I think that we can get this working so that we add a new flag to struct
>> pci_dev, something like 'no_additional_hotplug_bus_space' and in this quirk
>> set that.
>>
>> T
On Thu, Jun 27, 2013 at 04:54:05PM +0300, Mika Westerberg wrote:
> I think that we can get this working so that we add a new flag to struct
> pci_dev, something like 'no_additional_hotplug_bus_space' and in this quirk
> set that.
>
> Then in __pci_bus_size_bridges() we do:
>
> pci_bridge_ch
On Wed, Jun 26, 2013 at 5:56 PM, Yinghai Lu wrote:
> On Wed, Jun 26, 2013 at 3:55 PM, Bjorn Helgaas wrote:
>> On Wed, Jun 26, 2013 at 4:31 PM, Yinghai Lu wrote:
>>> On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
> On Tue, Jun 2
On Wed, Jun 26, 2013 at 03:26:59PM -0700, Yinghai Lu wrote:
> On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
> > On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
> > wrote:
> >> Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
> >> This means that the BIOS will al
On Wed, Jun 26, 2013 at 04:18:53PM -0600, Bjorn Helgaas wrote:
> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
> wrote:
> > Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
> > This means that the BIOS will allocate bridge resources based on some
> > assumptions of a m
On Wed, Jun 26, 2013 at 04:15:01PM -0600, Alex Williamson wrote:
> On Wed, 2013-06-26 at 14:59 -0600, Bjorn Helgaas wrote:
> > [+cc Alex]
> >
> > On Wed, Jun 26, 2013 at 6:17 AM, Mika Westerberg
> > wrote:
> > > On Tue, Jun 25, 2013 at 02:15:56PM -0700, Jesse Barnes wrote:
> > >> On Tue, 25 Jun 2
On Wed, Jun 26, 2013 at 3:55 PM, Bjorn Helgaas wrote:
> On Wed, Jun 26, 2013 at 4:31 PM, Yinghai Lu wrote:
>> On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
>>> On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
wrote:
> Th
On Wed, Jun 26, 2013 at 4:31 PM, Yinghai Lu wrote:
> On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
>> On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
>>> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
>>> wrote:
Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enu
On Wed, Jun 26, 2013 at 3:44 PM, Rafael J. Wysocki wrote:
> On Wednesday, June 26, 2013 03:31:18 PM Yinghai Lu wrote:
>> On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
>> > On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
>> >> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
>> >> wr
On Wednesday, June 26, 2013 03:31:18 PM Yinghai Lu wrote:
> On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
> > On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
> >> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
> >> wrote:
> >>> Thunderbolt PCI-to-PCI bridges typically use BIOS "ass
On Wed, Jun 26, 2013 at 3:26 PM, Yinghai Lu wrote:
> On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
>> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
>> wrote:
>>> Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
>>> This means that the BIOS will allocate bridg
On Wed, Jun 26, 2013 at 3:18 PM, Bjorn Helgaas wrote:
> On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
> wrote:
>> Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
>> This means that the BIOS will allocate bridge resources based on some
>> assumptions of a maximum Thun
On Tue, Jun 25, 2013 at 10:22 AM, Mika Westerberg
wrote:
> Thunderbolt PCI-to-PCI bridges typically use BIOS "assisted" enumeration.
> This means that the BIOS will allocate bridge resources based on some
> assumptions of a maximum Thunderbolt chain. It also disables native PCIe
> hotplug of the r
On Wed, 2013-06-26 at 14:59 -0600, Bjorn Helgaas wrote:
> [+cc Alex]
>
> On Wed, Jun 26, 2013 at 6:17 AM, Mika Westerberg
> wrote:
> > On Tue, Jun 25, 2013 at 02:15:56PM -0700, Jesse Barnes wrote:
> >> On Tue, 25 Jun 2013 19:22:10 +0300
> >> Mika Westerberg wrote:
> >>
> >> > + if (!(pci_probe
[+cc Alex]
On Wed, Jun 26, 2013 at 6:17 AM, Mika Westerberg
wrote:
> On Tue, Jun 25, 2013 at 02:15:56PM -0700, Jesse Barnes wrote:
>> On Tue, 25 Jun 2013 19:22:10 +0300
>> Mika Westerberg wrote:
>>
>> > + if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
>> > + pr_info("Thunderbolt host router
On Wed, Jun 26, 2013 at 03:17:57PM +0300, Mika Westerberg wrote:
> On Tue, Jun 25, 2013 at 02:15:56PM -0700, Jesse Barnes wrote:
> > On Tue, 25 Jun 2013 19:22:10 +0300
> > Mika Westerberg wrote:
> >
> > > + if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
> > > + pr_info("Thunderbolt host router d
On Tue, Jun 25, 2013 at 02:15:56PM -0700, Jesse Barnes wrote:
> On Tue, 25 Jun 2013 19:22:10 +0300
> Mika Westerberg wrote:
>
> > + if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
> > + pr_info("Thunderbolt host router detected disabling ROMs\n");
> > + pci_probe |= PCI_NOASSIGN_ROM
On Tue, 25 Jun 2013 19:22:10 +0300
Mika Westerberg wrote:
> + if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
> + pr_info("Thunderbolt host router detected disabling ROMs\n");
> + pci_probe |= PCI_NOASSIGN_ROMS;
> + }
I wonder if this should just be the default on x86? O
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