On Fri, 22 Jun 2018 17:08:58 PDT (-0700), rdun...@infradead.org wrote:
On 06/22/2018 04:20 PM, Palmer Dabbelt wrote:
From: Palmer Dabbelt
This patch adds a driver that manages the local interrupts on each
RISC-V hart, as specifiec by the RISC-V supervisor level ISA manual.
The local interrupt
On Fri, 22 Jun 2018, Palmer Dabbelt wrote:
> +struct riscv_irq_data {
> + struct irq_chip chip;
> + struct irq_domain *domain;
> + int hart;
> + charname[20];
> +};
> +DEFINE_PER_CPU(struct riscv_irq_data, riscv_irq_data);
stati
> +config RISCV_INTC
> + #bool "RISC-V Interrupt Controller"
> + depends on RISCV
> + default y
> + help
> +This enables support for the local interrupt controller found in
> +standard RISC-V systems. The local interrupt controller handles
> +timer interrupt
On 06/22/2018 04:20 PM, Palmer Dabbelt wrote:
> From: Palmer Dabbelt
>
> This patch adds a driver that manages the local interrupts on each
> RISC-V hart, as specifiec by the RISC-V supervisor level ISA manual.
> The local interrupt controller manages software interrupts, timer
> interrupts, and
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