On 28.08.14 16:01:08, Olof Johansson wrote:
> On Thu, Aug 28, 2014 at 11:14 AM, Robert Richter wrote:
> > On 28.08.14 09:31:43, Olof Johansson wrote:
> >> On Thu, Aug 28, 2014 at 9:25 AM, Mark Rutland wrote:
> >> > On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
> >> >> Olof,
> >>
On Thu, Aug 28, 2014 at 11:14 AM, Robert Richter wrote:
> On 28.08.14 09:31:43, Olof Johansson wrote:
>> On Thu, Aug 28, 2014 at 9:25 AM, Mark Rutland wrote:
>> > On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
>> >> Olof,
>> >>
>> >> On 30.07.14 11:14:23, Olof Johansson wrote:
>>
On 28.08.14 09:31:43, Olof Johansson wrote:
> On Thu, Aug 28, 2014 at 9:25 AM, Mark Rutland wrote:
> > On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
> >> Olof,
> >>
> >> On 30.07.14 11:14:23, Olof Johansson wrote:
> >> > On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> >
On Thu, Aug 28, 2014 at 9:25 AM, Mark Rutland wrote:
> On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
>> Olof,
>>
>> On 30.07.14 11:14:23, Olof Johansson wrote:
>> > On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
>> > > From: Radha Mohan Chintakuntla
>> > >
>> > > Add in
On Thu, Aug 28, 2014 at 05:15:56PM +0100, Robert Richter wrote:
> Olof,
>
> On 30.07.14 11:14:23, Olof Johansson wrote:
> > On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> > > From: Radha Mohan Chintakuntla
> > >
> > > Add initial device tree nodes for Cavium Thunder SoCs with support o
Olof,
On 30.07.14 11:14:23, Olof Johansson wrote:
> On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> > From: Radha Mohan Chintakuntla
> >
> > Add initial device tree nodes for Cavium Thunder SoCs with support of
> > 48 cores and gicv3. The dts file requires further changes, esp. for
> >
On 30.07.14 18:48:03, Mark Rutland wrote:
> > >> + uaa0: serial@87e02400 {
> > >> + compatible = "arm,pl011", "arm,primecell";
> > >> + reg = <0x87e0 0x2400 0x0 0x1000>;
> > >> + interrupts = <1 21 4>;
> > >> +
On Fri, Aug 01, 2014 at 06:04:11PM +0100, Robert Richter wrote:
> Mark,
Hi Robert,
> On 31.07.14 12:33:01, Mark Rutland wrote:
> > On Thu, Jul 31, 2014 at 12:12:33PM +0100, Ganapatrao Kulkarni wrote:
> > >We mark RAM used by ATF as secure-RAM, however we don't support
> > >secure/non-secu
Mark,
On 31.07.14 12:33:01, Mark Rutland wrote:
> On Thu, Jul 31, 2014 at 12:12:33PM +0100, Ganapatrao Kulkarni wrote:
> >We mark RAM used by ATF as secure-RAM, however we don't support
> >secure/non-secure address aliasing.
> >i.e, a DRAM address that can be referenced from both a sec
Olof,
On 30.07.14 11:14:23, Olof Johansson wrote:
> On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> > From: Radha Mohan Chintakuntla
> >
> > Add initial device tree nodes for Cavium Thunder SoCs with support of
> > 48 cores and gicv3. The dts file requires further changes, esp. for
> >
Mark,
On 30.07.14 16:46:26, Mark Rutland wrote:
> > diff --git a/arch/arm64/boot/dts/thunder-88xx.dts
> > b/arch/arm64/boot/dts/thunder-88xx.dts
> > new file mode 100644
> > index ..4cf20ac9138b
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/thunder-88xx.dts
> > @@ -0,0 +1,387 @@
>
On 31.07.14 10:22:19, Rob Herring wrote:
> On Thu, Jul 31, 2014 at 7:34 AM, Robert Richter wrote:
> > On 30.07.14 11:37:38, Rob Herring wrote:
> >> On Wed, Jul 30, 2014 at 10:46 AM, Mark Rutland
> >> wrote:
> >> > On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
> >> >> From: Radh
On Thu, Jul 31, 2014 at 7:34 AM, Robert Richter wrote:
> On 30.07.14 11:37:38, Rob Herring wrote:
>> On Wed, Jul 30, 2014 at 10:46 AM, Mark Rutland wrote:
>> > On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
>> >> From: Radha Mohan Chintakuntla
>
>> >> +/ {
>> >> + model = "C
On 30.07.14 11:37:38, Rob Herring wrote:
> On Wed, Jul 30, 2014 at 10:46 AM, Mark Rutland wrote:
> > On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
> >> From: Radha Mohan Chintakuntla
> >> +/ {
> >> + model = "Cavium ThunderX CN88XX Family";
> >> + compatible = "cavium,t
On 31.07.14 12:24:13, Arnd Bergmann wrote:
> On Wednesday 30 July 2014, Robert Richter wrote:
> > +/*
> > + * Cavium Thunder DTS file
> > + *
> > + * Copyright (C) 2013, Cavium Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of th
Please send plain text rather than HTML email; this is becoming painful
to reply to.
On Thu, Jul 31, 2014 at 12:12:33PM +0100, Ganapatrao Kulkarni wrote:
>On Thu, Jul 31, 2014 at 3:23 PM, Mark Rutland <[1]mark.rutl...@arm.com>
>wrote:
>
> On Thu, Jul 31, 2014 at 09:41:10AM +0100, Gan
Rob and Arnd,
On 30.07.14 11:37:38, Rob Herring wrote:
> >> +/*
> >> + * Cavium Thunder DTS file
> >> + *
> >> + * Copyright (C) 2013, Cavium Inc.
> >> + *
> >> + * This program is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU General Public License as
On Wednesday 30 July 2014, Robert Richter wrote:
> +/*
> + * Cavium Thunder DTS file
> + *
> + * Copyright (C) 2013, Cavium Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free
On Thu, Jul 31, 2014 at 09:41:10AM +0100, Ganapatrao Kulkarni wrote:
>On Wed, Jul 30, 2014 at 9:16 PM, Mark Rutland <[1]mark.rutl...@arm.com>
>wrote:
>
> Hi,
> On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
> > From: Radha Mohan Chintakuntla <[2]rchintakun..
On Wed, Jul 30, 2014 at 07:12:17PM +0100, Olof Johansson wrote:
> On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> > From: Radha Mohan Chintakuntla
> >
> > Add initial device tree nodes for Cavium Thunder SoCs with support of
> > 48 cores and gicv3. The dts file requires further changes,
On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> From: Radha Mohan Chintakuntla
>
> Add initial device tree nodes for Cavium Thunder SoCs with support of
> 48 cores and gicv3. The dts file requires further changes, esp. for
> pci, gicv3-its and smmu. This changes will be added later toget
On Wed, Jul 30, 2014 at 8:06 AM, Robert Richter wrote:
> From: Radha Mohan Chintakuntla
>
> Add initial device tree nodes for Cavium Thunder SoCs with support of
> 48 cores and gicv3. The dts file requires further changes, esp. for
> pci, gicv3-its and smmu. This changes will be added later toget
[...]
> >> + gic0: interrupt-controller@8010 {
> >
> > To make this easier to read, please place a comma between 32-bit
> > portions of the unit address (e.g. here have 8010,).
>
> Mark, perhaps a dtc or checkpatch.pl check for this?
Sure. Dodgy first atttempt at checkpatch b
On Wed, Jul 30, 2014 at 10:46 AM, Mark Rutland wrote:
> Hi,
>
> On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
>> From: Radha Mohan Chintakuntla
>>
>> Add initial device tree nodes for Cavium Thunder SoCs with support of
>> 48 cores and gicv3. The dts file requires further change
Hi,
On Wed, Jul 30, 2014 at 04:06:31PM +0100, Robert Richter wrote:
> From: Radha Mohan Chintakuntla
>
> Add initial device tree nodes for Cavium Thunder SoCs with support of
> 48 cores and gicv3. The dts file requires further changes, esp. for
> pci, gicv3-its and smmu. This changes will be add
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