On Mon, Aug 3, 2015 at 7:30 PM, Rabin Vincent wrote:
> On Mon, Aug 03, 2015 at 11:34:23AM +0200, Linus Walleij wrote:
>> On Fri, Jul 31, 2015 at 2:48 PM, Rabin Vincent wrote:
>> > +static void etraxfs_gpio_irq_ack(struct irq_data *d)
>> > +{
>> > + struct etraxfs_gpio_chip *chip = irq_data_
On Mon, Aug 03, 2015 at 11:34:23AM +0200, Linus Walleij wrote:
> On Fri, Jul 31, 2015 at 2:48 PM, Rabin Vincent wrote:
> > +static void etraxfs_gpio_irq_ack(struct irq_data *d)
> > +{
> > + struct etraxfs_gpio_chip *chip = irq_data_get_irq_chip_data(d);
>
> I don't see how this works in the
On Fri, Jul 31, 2015 at 2:48 PM, Rabin Vincent wrote:
> On ETRAX FS, all pins on the first port (and only the first port) have
> interrupt support.
>
> On ARTPEC-3, all pins on all ports have interrupt support. However,
> there are only eight interrupts. Each of the interrupts is associated
> w
On Fri, Jul 31, 2015 at 2:48 PM, Rabin Vincent wrote:
> On ETRAX FS, all pins on the first port (and only the first port) have
> interrupt support.
>
> On ARTPEC-3, all pins on all ports have interrupt support. However,
> there are only eight interrupts. Each of the interrupts is associated
> w
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