On Sat, Jan 12, 2013 at 10:06 AM, Maxime Ripard
wrote:
>> Use gpiochip_add_pin_range() from the GPIO driver.
>>
>> An example is provided in
>> drivers/pinctrl/pinctrl-coh901.c
>
> Ok, will do. But we need to find a way to share the pins arrays between
> the pinctrl and gpio drivers then.
>
> May
Hi Linus,
On 10/01/2013 12:06, Linus Walleij wrote:
> On Fri, Jan 4, 2013 at 5:45 PM, Maxime Ripard
> wrote:
>> +static int __devinit
>> +sunxi_pinctrl_register_gpio_ranges(struct sunxi_pinctrl *pctl)
>> +{
>> + int id = 0, base = 0, npins = 1, i, prev_pin = -1;
>> + struct pinctrl_gp
On Fri, Jan 4, 2013 at 5:45 PM, Maxime Ripard
wrote:
> The IP responsible for the muxing on the Allwinner SoCs are also
> handling the GPIOs on the system. This patch adds the needed driver that
> relies on the pinctrl driver for most of its operations.
>
> The number of pins available for GPIOs
3 matches
Mail list logo
