Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b

2019-10-01 Thread Jerome Brunet
On Mon 23 Sep 2019 at 22:49, Martin Blumenstingl wrote: > Hi Jerome, > > On Mon, Sep 23, 2019 at 12:06 PM Jerome Brunet wrote: >> >> On Sat 21 Sep 2019 at 17:18, Martin Blumenstingl >> wrote: >> >> > Meson8 and Meson8b SoCs embed a DDR clock controller in their MMCBUS >> > registers. This s

Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b

2019-09-23 Thread Martin Blumenstingl
Hi Jerome, On Mon, Sep 23, 2019 at 12:06 PM Jerome Brunet wrote: > > On Sat 21 Sep 2019 at 17:18, Martin Blumenstingl > wrote: > > > Meson8 and Meson8b SoCs embed a DDR clock controller in their MMCBUS > > registers. This series: > > - adds support for this DDR clock controller (patches 0 and 1

Re: [PATCH 0/6] add the DDR clock controller on Meson8 and Meson8b

2019-09-23 Thread Jerome Brunet
On Sat 21 Sep 2019 at 17:18, Martin Blumenstingl wrote: > Meson8 and Meson8b SoCs embed a DDR clock controller in their MMCBUS > registers. This series: > - adds support for this DDR clock controller (patches 0 and 1) > - wires up the DDR PLL as input for two audio clocks (patches 2 and 3) Have