On Fri, 12 Jan 2018, David Woodhouse wrote:
> +/* Check for Skylake-like CPUs (for RSB handling) */
> +static bool __init is_skylake_era(void)
> +{
> + if (boot_cpu_data.x86 == 6) {
This wants a checkfor vendor = intel
> + switch (boot_cpu_data.x86_model) {
> + case I
On Fri, Jan 12, 2018 at 06:56:18PM +, David Woodhouse wrote:
> On Fri, 2018-01-12 at 18:05 +, Andrew Cooper wrote:
> >
> > If you unconditionally fill the RSB on every entry to supervisor mode,
> > then there are never guest-controlled RSB values to be found.
> >
> > With that property (a
On Fri, 2018-01-12 at 18:05 +, Andrew Cooper wrote:
>
> If you unconditionally fill the RSB on every entry to supervisor mode,
> then there are never guest-controlled RSB values to be found.
>
> With that property (and IBRS to protect Skylake+), you shouldn't need
> RSB filling anywhere in th
On Fri, 2018-01-12 at 10:02 -0800, Andi Kleen wrote:
> > + if ((!boot_cpu_has(X86_FEATURE_PTI) &&
> > + !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
> > + setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
> > + pr_info("Filling RSB on context switch\n");
>
On 12/01/18 17:49, David Woodhouse wrote:
> When we context switch from a shallow call stack to a deeper one, as we
> 'ret' up the deeper side we may encounter RSB entries (predictions for
> where the 'ret' goes to) which were populated in userspace. This is
> problematic if we have neither SMEP no
> + if ((!boot_cpu_has(X86_FEATURE_PTI) &&
> + !boot_cpu_has(X86_FEATURE_SMEP)) || is_skylake_era()) {
> + setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW);
> + pr_info("Filling RSB on context switch\n");
We need to do more things for Skylake (like idle and interrupt
6 matches
Mail list logo
