On Thu, Feb 05, 2015 at 12:27:31PM +0100, Paul Bolle wrote:
> I'm _guessing_ that CPU_32v4 and CPU_32v4T are needed for the ldrd and
> strd assembler instructions. If that's right a next _guess_ would be
> that you also need to mention CPU_32v3 here.
No. Double word instructions are available in
On 5 February 2015 at 04:27, Paul Bolle wrote:
> On Wed, 2015-02-04 at 15:22 -0700, mathieu.poir...@linaro.org wrote:
>> From: Pratik Patel
>>
>> This driver adds support for the STM CoreSight IP block,
>> allowing any system compoment (HW or SW) to log and
>> aggregate messages via a single enti
On Thu, 2015-02-05 at 08:51 -0700, Mathieu Poirier wrote:
> On 5 February 2015 at 04:27, Paul Bolle wrote:
> > On Wed, 2015-02-04 at 15:22 -0700, mathieu.poir...@linaro.org wrote:
> >> @@ -58,4 +58,14 @@ config CORESIGHT_SOURCE_ETM3X
> >> which allows tracing the instructions that a proces
On 5 February 2015 at 04:27, Paul Bolle wrote:
> On Wed, 2015-02-04 at 15:22 -0700, mathieu.poir...@linaro.org wrote:
>> From: Pratik Patel
>>
>> This driver adds support for the STM CoreSight IP block,
>> allowing any system compoment (HW or SW) to log and
>> aggregate messages via a single enti
On Wed, 2015-02-04 at 15:22 -0700, mathieu.poir...@linaro.org wrote:
> From: Pratik Patel
>
> This driver adds support for the STM CoreSight IP block,
> allowing any system compoment (HW or SW) to log and
> aggregate messages via a single entity.
>
> The STM exposes an application defined number
On Wed, 2015-02-04 at 15:22 -0700, mathieu.poir...@linaro.org wrote:
> From: Pratik Patel
>
> This driver adds support for the STM CoreSight IP block,
> allowing any system compoment (HW or SW) to log and
> aggregate messages via a single entity.
>
> The STM exposes an application defined number
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