RE: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-16 Thread Daniel Lustig
> From: Will Deacon [mailto:will.dea...@arm.com] > Hi Daniel, > > On Thu, Nov 16, 2017 at 06:40:46AM +, Daniel Lustig wrote: > > > > In that case, maybe we should just start out having a fence on > > > > both sides for > > > > > > Actually, given your architecture is RCsc rather than RCpc, so

Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-16 Thread Will Deacon
Hi Daniel, On Thu, Nov 16, 2017 at 06:40:46AM +, Daniel Lustig wrote: > > > In that case, maybe we should just start out having a fence on both > > > sides for > > > > Actually, given your architecture is RCsc rather than RCpc, so I think maybe > > you could follow the way that ARM uses(i.e.

RE: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Daniel Lustig
> > In that case, maybe we should just start out having a fence on both > > sides for > > Actually, given your architecture is RCsc rather than RCpc, so I think maybe > you could follow the way that ARM uses(i.e. relaxed load + release store + a > full barrier). You can see the commit log of 8e86f

RE: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Palmer Dabbelt
On Wed, 15 Nov 2017 15:59:44 PST (-0800), Daniel Lustig wrote: On Wed, 15 Nov 2017 10:06:01 PST (-0800), will.dea...@arm.com wrote: On Tue, Nov 14, 2017 at 12:30:59PM -0800, Palmer Dabbelt wrote: > On Tue, 24 Oct 2017 07:10:33 PDT (-0700), will.dea...@arm.com wrote: >>On Tue, Sep 26, 2017 at 06:

Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Boqun Feng
> > Bergmann ; Olof Johansson ; linux- > > ker...@vger.kernel.org; patc...@groups.riscv.org; pet...@infradead.org > > Subject: Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code > > > > On Wed, Nov 15, 2017 at 11:59:44PM +, Daniel Lustig wrote

RE: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Daniel Lustig
groups.riscv.org; pet...@infradead.org > Subject: Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code > > On Wed, Nov 15, 2017 at 11:59:44PM +, Daniel Lustig wrote: > > > On Wed, 15 Nov 2017 10:06:01 PST (-0800), will.dea...@arm.com wrote: > > >> On Tue, Nov

Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Boqun Feng
On Wed, Nov 15, 2017 at 11:59:44PM +, Daniel Lustig wrote: > > On Wed, 15 Nov 2017 10:06:01 PST (-0800), will.dea...@arm.com wrote: > >> On Tue, Nov 14, 2017 at 12:30:59PM -0800, Palmer Dabbelt wrote: > >> > On Tue, 24 Oct 2017 07:10:33 PDT (-0700), will.dea...@arm.com wrote: > >> >>On Tue, Sep

RE: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Daniel Lustig
> On Wed, 15 Nov 2017 10:06:01 PST (-0800), will.dea...@arm.com wrote: >> On Tue, Nov 14, 2017 at 12:30:59PM -0800, Palmer Dabbelt wrote: >> > On Tue, 24 Oct 2017 07:10:33 PDT (-0700), will.dea...@arm.com wrote: >> >>On Tue, Sep 26, 2017 at 06:56:31PM -0700, Palmer Dabbelt wrote: > > > > Hi Palmer,

Re: [patches] Re: [PATCH v9 05/12] RISC-V: Atomic and Locking Code

2017-11-15 Thread Palmer Dabbelt
On Wed, 15 Nov 2017 10:06:01 PST (-0800), will.dea...@arm.com wrote: Hi Palmer, On Tue, Nov 14, 2017 at 12:30:59PM -0800, Palmer Dabbelt wrote: On Tue, 24 Oct 2017 07:10:33 PDT (-0700), will.dea...@arm.com wrote: >On Tue, Sep 26, 2017 at 06:56:31PM -0700, Palmer Dabbelt wrote: >>+ATOMIC_OPS(add