>+static inline void macb_handle_txtstamp(struct macb *bp, struct sk_buff *skb,
>+ struct macb_dma_desc *desc)
>+{
>+ u32 ts_s, ts_ns;
>+ u8 msg_type;
>+
>+ skb_copy_from_linear_data_offset(skb, GEM_TX_PTPHDR_OFFSET,
>+
: [RFC PATCH 2/3] net: macb: Add support for 1588 for Zynq
Ultrascale+ MPSoC
Le 21/09/2015 à 19:49, Harini Katakam a écrit :
On Fri, Sep 11, 2015 at 1:27 PM, Harini Katakam
wrote:
Cadence GEM in Zynq Ultrascale+ MPSoC supports 1588 and provides a
102 bit time counter with 48 bits for seconds, 30 bits
ezillon > electrons.com>; alexandre.bell...@free-electrons.com;
>> net...@vger.kernel.org; linux-kernel@vger.kernel.org;
>> devicet...@vger.kernel.org; Punnaiah Choudary Kalluri
>> ; Michal Simek ; Anirudha
>> Sarangi
>> Subject: Re: [RFC PATCH 2/3] net: macb: Add supp
Hi Andrei,
On Wed, Aug 10, 2016 at 3:42 PM, Andrei Pistirica
wrote:
> Hi Punnaiah,
>
> cpts_match(...) has a way to parse frames, while ptp_classify_raw identifies
> the underlying protocol (in case the frames are parsed on data path), or
> tx/rxtstamp callbacks can be used with PTP events. But,
;> net...@vger.kernel.org; linux-kernel@vger.kernel.org;
>> devicet...@vger.kernel.org; Punnaiah Choudary Kalluri
>> ; Michal Simek ; Anirudha
>> Sarangi
>> Subject: Re: [RFC PATCH 2/3] net: macb: Add support for 1588 for Zynq
>> Ultrascale+ MPSoC
>>
>> Le 21/0
t; Boris Brezillon electrons.com>; alexandre.bell...@free-electrons.com;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> devicet...@vger.kernel.org; Punnaiah Choudary Kalluri
> ; Michal Simek ; Anirudha
> Sarangi
> Subject: Re: [RFC PATCH 2/3] net: macb: Add support for 1588 for Z
Le 21/09/2015 à 19:49, Harini Katakam a écrit :
> On Fri, Sep 11, 2015 at 1:27 PM, Harini Katakam
> wrote:
>> Cadence GEM in Zynq Ultrascale+ MPSoC supports 1588 and provides a
>> 102 bit time counter with 48 bits for seconds, 30 bits for nsecs and
>> 24 bits for sub-nsecs. The timestamp is made a
Hi Richard,
On Tue, Sep 22, 2015 at 12:09 AM, Richard Cochran
wrote:
> On Mon, Sep 21, 2015 at 11:19:32PM +0530, Harini Katakam wrote:
>> Ping
>
> 1) trim your replies
>
> 2) put the PTP maintainer on PTP patches for review
>
I'm sorry I missed that. Will do so in the future.
Regards,
Harini
--
On Mon, Sep 21, 2015 at 11:19:32PM +0530, Harini Katakam wrote:
> Ping
1) trim your replies
2) put the PTP maintainer on PTP patches for review
Thanks,
Richard
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On Fri, Sep 11, 2015 at 1:27 PM, Harini Katakam
wrote:
> Cadence GEM in Zynq Ultrascale+ MPSoC supports 1588 and provides a
> 102 bit time counter with 48 bits for seconds, 30 bits for nsecs and
> 24 bits for sub-nsecs. The timestamp is made available to the SW through
> registers as well as (more
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