On Wed, Oct 09, 2024 at 03:20:57PM +0800, Yi Liu wrote:
> On 2024/10/1 05:59, Nicolin Chen wrote:
> > On Sun, Sep 29, 2024 at 03:16:55PM +0800, Yi Liu wrote:
> > > > > > I feel these two might act somehow similarly to the two DIDs
> > > > > > during nested translations?
> > > > >
> > > > > not qui
On 2024/10/1 05:59, Nicolin Chen wrote:
On Sun, Sep 29, 2024 at 03:16:55PM +0800, Yi Liu wrote:
I feel these two might act somehow similarly to the two DIDs
during nested translations?
not quite the same. Is it possible that the ASID is the same for stage-1?
Intel VT-d side can have the pasid
On Tue, Oct 01, 2024 at 10:48:15AM -0300, Jason Gunthorpe wrote:
> On Sun, Sep 29, 2024 at 03:19:42PM +0800, Yi Liu wrote:
> > > So their viommu HW concepts come along with a requirement that there
> > > be a fixed translation for the VM, which we model by attaching a S2
> > > HWPT to the VIOMMU ob
On Tue, Oct 01, 2024 at 03:06:57PM +1000, Alexey Kardashevskiy wrote:
> I've just read in this thread that "it should be generally restricted to the
> number of pIOMMUs, although likely (not 100% sure) we could do multiple
> vIOMMUs on a single-pIOMMU system. Any reason for doing that?"? thought "w
On Sun, Sep 29, 2024 at 03:19:42PM +0800, Yi Liu wrote:
> > So their viommu HW concepts come along with a requirement that there
> > be a fixed translation for the VM, which we model by attaching a S2
> > HWPT to the VIOMMU object which get's linked into the IOMMU HW as
> > the translation for the
On 1/10/24 13:36, Nicolin Chen wrote:
On Tue, Oct 01, 2024 at 11:55:59AM +1000, Alexey Kardashevskiy wrote:
On 11/9/24 17:08, Nicolin Chen wrote:
On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
From: Nicolin Chen
Sent: Wednesday, August 28, 2024 1:00 AM
[...]
On a multi-IOM
On Tue, Oct 01, 2024 at 11:55:59AM +1000, Alexey Kardashevskiy wrote:
> On 11/9/24 17:08, Nicolin Chen wrote:
> > On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
> > > > From: Nicolin Chen
> > > > Sent: Wednesday, August 28, 2024 1:00 AM
> > > >
> > > [...]
> > > > On a multi-IOMMU s
On 11/9/24 17:08, Nicolin Chen wrote:
On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
From: Nicolin Chen
Sent: Wednesday, August 28, 2024 1:00 AM
[...]
On a multi-IOMMU system, the VIOMMU object can be instanced to the
number
of vIOMMUs in a guest VM, while holding the same pare
On Sun, Sep 29, 2024 at 03:16:55PM +0800, Yi Liu wrote:
> > > > I feel these two might act somehow similarly to the two DIDs
> > > > during nested translations?
> > >
> > > not quite the same. Is it possible that the ASID is the same for stage-1?
> > > Intel VT-d side can have the pasid to be the
On 2024/9/27 20:20, Jason Gunthorpe wrote:
On Fri, Sep 27, 2024 at 08:12:20PM +0800, Yi Liu wrote:
Perhaps calling it a slice sounds more accurate, as I guess all
the confusion comes from the name "vIOMMU" that might be thought
to be a user space object/instance that likely holds all virtual
stu
On 2024/9/28 04:44, Nicolin Chen wrote:
On Fri, Sep 27, 2024 at 08:12:20PM +0800, Yi Liu wrote:
On 2024/9/27 14:32, Nicolin Chen wrote:
On Fri, Sep 27, 2024 at 01:54:45PM +0800, Yi Liu wrote:
Baolu told me that Intel may have the same: different domain IDs
on different IOMMUs; multiple IOMMU i
On Fri, Sep 27, 2024 at 08:12:20PM +0800, Yi Liu wrote:
> On 2024/9/27 14:32, Nicolin Chen wrote:
> > On Fri, Sep 27, 2024 at 01:54:45PM +0800, Yi Liu wrote:
> > > > > > Baolu told me that Intel may have the same: different domain IDs
> > > > > > on different IOMMUs; multiple IOMMU instances on one
On 2024/9/27 14:32, Nicolin Chen wrote:
On Fri, Sep 27, 2024 at 01:54:45PM +0800, Yi Liu wrote:
Baolu told me that Intel may have the same: different domain IDs
on different IOMMUs; multiple IOMMU instances on one chip:
https://lore.kernel.org/linux-iommu/cf4fe15c-8bcb-4132-a1fd-b2c8ddf27...@lin
On Fri, Sep 27, 2024 at 08:12:20PM +0800, Yi Liu wrote:
> > Perhaps calling it a slice sounds more accurate, as I guess all
> > the confusion comes from the name "vIOMMU" that might be thought
> > to be a user space object/instance that likely holds all virtual
> > stuff like stage-1 HWPT or so?
>
On Fri, Sep 27, 2024 at 01:54:45PM +0800, Yi Liu wrote:
> > > > Baolu told me that Intel may have the same: different domain IDs
> > > > on different IOMMUs; multiple IOMMU instances on one chip:
> > > > https://lore.kernel.org/linux-iommu/cf4fe15c-8bcb-4132-a1fd-b2c8ddf27...@linux.intel.com/
> > >
On 2024/9/27 10:05, Baolu Lu wrote:
On 9/27/24 4:03 AM, Nicolin Chen wrote:
On Thu, Sep 26, 2024 at 04:47:02PM +0800, Yi Liu wrote:
On 2024/9/26 02:55, Nicolin Chen wrote:
On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
Hi Nic,
On 2024/8/28 00:59, Nicolin Chen wrote:
This series int
On 2024/9/27 04:03, Nicolin Chen wrote:
On Thu, Sep 26, 2024 at 04:47:02PM +0800, Yi Liu wrote:
On 2024/9/26 02:55, Nicolin Chen wrote:
On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
Hi Nic,
On 2024/8/28 00:59, Nicolin Chen wrote:
This series introduces a new VIOMMU infrastructure a
On 9/27/24 4:03 AM, Nicolin Chen wrote:
On Thu, Sep 26, 2024 at 04:47:02PM +0800, Yi Liu wrote:
On 2024/9/26 02:55, Nicolin Chen wrote:
On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
Hi Nic,
On 2024/8/28 00:59, Nicolin Chen wrote:
This series introduces a new VIOMMU infrastructure a
On Thu, Sep 26, 2024 at 04:47:02PM +0800, Yi Liu wrote:
> On 2024/9/26 02:55, Nicolin Chen wrote:
> > On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
> > > Hi Nic,
> > >
> > > On 2024/8/28 00:59, Nicolin Chen wrote:
> > > > This series introduces a new VIOMMU infrastructure and related ioc
On 2024/9/26 02:55, Nicolin Chen wrote:
On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
Hi Nic,
On 2024/8/28 00:59, Nicolin Chen wrote:
This series introduces a new VIOMMU infrastructure and related ioctls.
IOMMUFD has been using the HWPT infrastructure for all cases, including a
nest
On Wed, Sep 25, 2024 at 06:30:20PM +0800, Yi Liu wrote:
> Hi Nic,
>
> On 2024/8/28 00:59, Nicolin Chen wrote:
> > This series introduces a new VIOMMU infrastructure and related ioctls.
> >
> > IOMMUFD has been using the HWPT infrastructure for all cases, including a
> > nested IO page table suppo
Hi Nic,
On 2024/8/28 00:59, Nicolin Chen wrote:
This series introduces a new VIOMMU infrastructure and related ioctls.
IOMMUFD has been using the HWPT infrastructure for all cases, including a
nested IO page table support. Yet, there're limitations for an HWPT-based
structure to support some ad
On Wed, Sep 11, 2024 at 08:08:04AM +, Tian, Kevin wrote:
> > From: Nicolin Chen
> > Sent: Wednesday, September 11, 2024 3:41 PM
> >
> > On Wed, Sep 11, 2024 at 07:18:10AM +, Tian, Kevin wrote:
> > > > From: Nicolin Chen
> > > > Sent: Wednesday, September 11, 2024 3:08 PM
> > > >
> > > > O
> From: Nicolin Chen
> Sent: Wednesday, September 11, 2024 3:41 PM
>
> On Wed, Sep 11, 2024 at 07:18:10AM +, Tian, Kevin wrote:
> > > From: Nicolin Chen
> > > Sent: Wednesday, September 11, 2024 3:08 PM
> > >
> > > On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
> > > > > From:
On Wed, Sep 11, 2024 at 07:18:10AM +, Tian, Kevin wrote:
> > From: Nicolin Chen
> > Sent: Wednesday, September 11, 2024 3:08 PM
> >
> > On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
> > > > From: Nicolin Chen
> > > > Sent: Wednesday, August 28, 2024 1:00 AM
> > > >
> > > [...]
> From: Nicolin Chen
> Sent: Wednesday, September 11, 2024 3:08 PM
>
> On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
> > > From: Nicolin Chen
> > > Sent: Wednesday, August 28, 2024 1:00 AM
> > >
> > [...]
> > > On a multi-IOMMU system, the VIOMMU object can be instanced to the
> >
On Wed, Sep 11, 2024 at 06:12:21AM +, Tian, Kevin wrote:
> > From: Nicolin Chen
> > Sent: Wednesday, August 28, 2024 1:00 AM
> >
> [...]
> > On a multi-IOMMU system, the VIOMMU object can be instanced to the
> > number
> > of vIOMMUs in a guest VM, while holding the same parent HWPT to share
>
> From: Nicolin Chen
> Sent: Wednesday, August 28, 2024 1:00 AM
>
[...]
> On a multi-IOMMU system, the VIOMMU object can be instanced to the
> number
> of vIOMMUs in a guest VM, while holding the same parent HWPT to share
> the
Is there restriction that multiple vIOMMU objects can be only create
28 matches
Mail list logo
