Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-11-25 Thread Mark Brown
On Tue, Nov 25, 2014 at 12:06:41PM -0800, Olof Johansson wrote: > On Mon, Sep 29, 2014 at 7:22 AM, Weike Chen wrote: > > This piece of work is derived from Dan O'Donovan's initial work for Intel > > Quark > > X1000 SPI enabling. > How about build testing for other platforms that share this driv

Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-11-25 Thread Olof Johansson
Hi, On Mon, Sep 29, 2014 at 7:22 AM, Weike Chen wrote: > There are two SPI controllers exported by PCI subsystem for Intel Quark X1000. > The SPI memory mapped I/O registers supported by Quark are different from > the current implementation, and Quark only supports the registers of 'SSCR0', > 'SS

Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-10-08 Thread Bryan O'Donoghue
On 08/10/14 08:48, Chen, Alvin wrote: Now, we have another board which can support 4 slave spi per master, but not only Galileo. Since that board is not public, after discussing with team, we decide to make the upstream code to support '1'. I will change it back to .num_chipselect = 1, Hi A

RE: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-10-08 Thread Chen, Alvin
> > On 29/09/14 15:22, Weike Chen wrote: > > + .num_chipselect = 4, > > How is this right ? > > There's only one physical chip-select line per SPI master... > > It's a 1:1 mapping. > Now, we have another board which can support 4 slave spi per master, but not only Galileo. Since th

RE: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-10-07 Thread Chen, Alvin
> > The SPI memory mapped I/O registers supported by Quark are different > > from the current implementation, and Quark only supports the registers > > of 'SSCR0', 'SSCR1', 'SSSR', 'SSDR', and 'DDS_RATE'. This patch is to > > enable the SPI for Intel Quark X1000. > > > > This piece of work is deriv

Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-10-07 Thread Bryan O'Donoghue
On 29/09/14 15:22, Weike Chen wrote: + .num_chipselect = 4, How is this right ? There's only one physical chip-select line per SPI master... It's a 1:1 mapping. Best, Bryan -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to ma

Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-09-29 Thread Mika Westerberg
On Mon, Sep 29, 2014 at 07:22:28AM -0700, Weike Chen wrote: > There are two SPI controllers exported by PCI subsystem for Intel Quark X1000. > The SPI memory mapped I/O registers supported by Quark are different from > the current implementation, and Quark only supports the registers of 'SSCR0', >

Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

2014-09-29 Thread Andy Shevchenko
On Mon, 2014-09-29 at 07:22 -0700, Weike Chen wrote: > There are two SPI controllers exported by PCI subsystem for Intel Quark X1000. > The SPI memory mapped I/O registers supported by Quark are different from > the current implementation, and Quark only supports the registers of 'SSCR0', > 'SSCR1'