On Fri, May 09, 2014 at 11:35:21AM +0300, Heikki Krogerus wrote:
> Unlike other Intel LPSS devices, the PWM does not have the
> clock dividers or the gate. All we get from the clock is the
> rate. Since PCI case uses the driver data to get the rate,
> we can drop the clk and use the same data also
>
> Hi,
>
> On Wed, May 14, 2014 at 07:00:59AM +, Chew, Chiau Ee wrote:
> > Heikki,
> > For ACPI mode, the clock rate information for PWM is being setup in the
> acpi_lpss.c layer.
> > Thus, only PCI mode depends on the driver_data to pass in the clock rate
> information.
>
> The goal with t
Hi,
On Wed, May 14, 2014 at 07:00:59AM +, Chew, Chiau Ee wrote:
> Heikki,
> For ACPI mode, the clock rate information for PWM is being setup in the
> acpi_lpss.c layer.
> Thus, only PCI mode depends on the driver_data to pass in the clock rate
> information.
The goal with this patch is actu
> Unlike other Intel LPSS devices, the PWM does not have the clock dividers or
> the gate. All we get from the clock is the rate. Since PCI case uses the
> driver
> data to get the rate, we can drop the clk and use the same data also in case
> of
> ACPI. The frequency is the same.
>
> Signed-of
On Fri, May 09, 2014 at 11:35:21AM +0300, Heikki Krogerus wrote:
> Unlike other Intel LPSS devices, the PWM does not have the
> clock dividers or the gate. All we get from the clock is the
> rate. Since PCI case uses the driver data to get the rate,
> we can drop the clk and use the same data also
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