Andrew Morton wrote:
Corey Minyard <[EMAIL PROTECTED]> wrote:
This patch fixes a race between the CMOS clock setting and the NMI
code. The NMI code indiscriminatly sets index registers and values
in the same place the CMOS clock is set. If you are setting the
CMOS clock and an NMI occurs, Bad
Andrew Morton wrote:
Corey Minyard <[EMAIL PROTECTED]> wrote:
This patch fixes a race between the CMOS clock setting and the NMI
code. The NMI code indiscriminatly sets index registers and values
in the same place the CMOS clock is set. If you are setting the
CMOS clock and an NMI occurs, Bad
Corey Minyard <[EMAIL PROTECTED]> wrote:
>
> This patch fixes a race between the CMOS clock setting and the NMI
> code. The NMI code indiscriminatly sets index registers and values
> in the same place the CMOS clock is set. If you are setting the
> CMOS clock and an NMI occurs, Bad values coul
This patch fixes a race between the CMOS clock setting and the NMI
code. The NMI code indiscriminatly sets index registers and values
in the same place the CMOS clock is set. If you are setting the
CMOS clock and an NMI occurs, Bad values could be written to or
read from the CMOS RAM, or the NMI
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