Re: PREEMPT/PREEMPT_RT question

2005-07-13 Thread Paul E. McKenney
On Tue, Jul 12, 2005 at 11:54:50PM -0400, Steven Rostedt wrote: > On Tue, 2005-07-12 at 18:46 -0700, Paul E. McKenney wrote: > > > > If you are talking about scheduler_tick, then yes, it is called by the > > > timer interrupt which is a SA_NODELAY interrupt. If you don't want to > > > get interru

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Steven Rostedt
On Tue, 2005-07-12 at 18:46 -0700, Paul E. McKenney wrote: > > If you are talking about scheduler_tick, then yes, it is called by the > > timer interrupt which is a SA_NODELAY interrupt. If you don't want to > > get interrupted by the timer interrupt, then you will need to disable > > interrupts

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Paul E. McKenney
On Tue, Jul 12, 2005 at 07:47:15PM -0400, Steven Rostedt wrote: > On Tue, 2005-07-12 at 14:34 -0700, Paul E. McKenney wrote: > > > Yeah, mips has the crazy Load Linked and Store Conditional crap, so it > > > is a little more complex than the simple add one. And I think PPC does > > > too, although

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Steven Rostedt
On Tue, 2005-07-12 at 14:34 -0700, Paul E. McKenney wrote: > > > > Yeah, mips has the crazy Load Linked and Store Conditional crap, so it > > is a little more complex than the simple add one. And I think PPC does > > too, although it has been a while since I've used them. And older mips > > don

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Paul E. McKenney
On Tue, Jul 12, 2005 at 04:04:17PM -0400, Steven Rostedt wrote: > On Tue, 2005-07-12 at 12:28 -0700, Paul E. McKenney wrote: > > > > > > So is there a difference on UP between x.counter++ and atomic_inc(&x)? > > > > On x86, you are right. The full list of architectures that are atomic > > only i

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Paul E. McKenney
On Tue, Jul 12, 2005 at 09:26:35PM +0200, Ingo Molnar wrote: > * Paul E. McKenney <[EMAIL PROTECTED]> wrote: > > So, time to get serious about a bit of code cleanup: > > > > o The heavyweight atomic operations in rcu_read_lock() and > > rcu_read_unlock() are not needed in UP kernels, since >

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Steven Rostedt
On Tue, 2005-07-12 at 12:28 -0700, Paul E. McKenney wrote: > > > > So is there a difference on UP between x.counter++ and atomic_inc(&x)? > > On x86, you are right. The full list of architectures that are atomic > only in SMP are i386 (as you noted), parisc, sparc, and x86_64. > > The architect

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Paul E. McKenney
On Tue, Jul 12, 2005 at 01:05:24PM -0400, Steven Rostedt wrote: > On Tue, 2005-07-12 at 09:30 -0700, Paul E. McKenney wrote: > > Hello! > > > > OK, counter-flip RCU actually survives a pair of overnight runs on > > CONFIG_PREEMPT running on 4-CPU machines, and also survives five > > kernbenches an

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Ingo Molnar
* Paul E. McKenney <[EMAIL PROTECTED]> wrote: > Hello! > > OK, counter-flip RCU actually survives a pair of overnight runs on > CONFIG_PREEMPT running on 4-CPU machines, and also survives five > kernbenches and an LTP on another 4-CPU machine. [...] cool! > So, time to get serious about a bi

Re: PREEMPT/PREEMPT_RT question

2005-07-12 Thread Steven Rostedt
On Tue, 2005-07-12 at 09:30 -0700, Paul E. McKenney wrote: > Hello! > > OK, counter-flip RCU actually survives a pair of overnight runs on > CONFIG_PREEMPT running on 4-CPU machines, and also survives five > kernbenches and an LTP on another 4-CPU machine. (Overnight-run script > later in this me

PREEMPT/PREEMPT_RT question

2005-07-12 Thread Paul E. McKenney
Hello! OK, counter-flip RCU actually survives a pair of overnight runs on CONFIG_PREEMPT running on 4-CPU machines, and also survives five kernbenches and an LTP on another 4-CPU machine. (Overnight-run script later in this message, FWIW.) So, time to get serious about a bit of code cleanup: o