Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

2017-01-25 Thread Ricardo Neri
On Wed, 2017-01-25 at 12:38 -0800, H. Peter Anvin wrote: > On 01/25/17 12:23, Ricardo Neri wrote: > > + case UMIP_SMSW: > > + dummy_value = CR0_STATE; > > Unless the user space process is running in 64-bit mode this value > should be & 0x. But wouldn't that prevent the bits CR0[63

Re: [v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

2017-01-25 Thread H. Peter Anvin
On 01/25/17 12:23, Ricardo Neri wrote: > + case UMIP_SMSW: > + dummy_value = CR0_STATE; Unless the user space process is running in 64-bit mode this value should be & 0x. I'm not sure if we should even support fixing up UMIP instructions in 64-bit mode. Also, please put an ex

[v3 PATCH 07/10] x86: Add emulation code for UMIP instructions

2017-01-25 Thread Ricardo Neri
The feature User-Mode Instruction Prevention present in recent Intel processor prevents a group of instructions from being executed with CPL > 0. Otherwise, a general protection fault is issued. Rather than relaying this fault to the user space (in the form of a SIGSEGV signal), the instructions p