Re: [patch V2 17/29] x86/exceptions: Disconnect IST index and stack order

2019-04-05 Thread Thomas Gleixner
On Fri, 5 Apr 2019, Josh Poimboeuf wrote: > On Fri, Apr 05, 2019 at 05:07:15PM +0200, Thomas Gleixner wrote: > > +/* > > + * The exception stack ordering in [cea_]exception_stacks > > + */ > > +enum exception_stack_ordering { > > + ISTACK_DF, > > + ISTACK_NMI, > > + ISTACK_DB, > > + ISTACK

Re: [patch V2 17/29] x86/exceptions: Disconnect IST index and stack order

2019-04-05 Thread Josh Poimboeuf
On Fri, Apr 05, 2019 at 05:07:15PM +0200, Thomas Gleixner wrote: > +/* > + * The exception stack ordering in [cea_]exception_stacks > + */ > +enum exception_stack_ordering { > + ISTACK_DF, > + ISTACK_NMI, > + ISTACK_DB, > + ISTACK_MCE, > + N_EXCEPTION_STACKS > +}; While clever,

[patch V2 17/29] x86/exceptions: Disconnect IST index and stack order

2019-04-05 Thread Thomas Gleixner
The entry order of the TSS.IST array and the order of the stack storage/mapping are not required to be the same. With the upcoming split of the debug stack this is going to fall apart as the number of TSS.IST array entries stays the same while the actual stacks are increasing. Make them separate