On Fri, 2013-10-04 at 18:28 +0200, Michal Simek wrote:
> On 10/02/2013 07:46 PM, Jason Gunthorpe wrote:
> > On Wed, Oct 02, 2013 at 05:35:58PM +0200, Michal Simek wrote:
> >
> >> +What: /sys/class/fpga_manager/fpga/fpga_config_state
> >> +Date: October 2013
> >> +KernelVers
On Fri, Oct 04, 2013 at 06:28:23PM +0200, Michal Simek wrote:
> > I strongly encourage you to use text strings to indicate the state of
> > the configuration FSM, and I *really* think you should rework things
> > to have an explicit configuration FSM rather than trying to bodge one
> > together wit
On 10/02/2013 07:46 PM, Jason Gunthorpe wrote:
> On Wed, Oct 02, 2013 at 05:35:58PM +0200, Michal Simek wrote:
>
>> +What: /sys/class/fpga_manager/fpga/fpga_config_state
>> +Date: October 2013
>> +KernelVersion: 3.12
>> +Contact:Michal Simek
>> +Description:
>
On Fri, Oct 04, 2013 at 06:15:28PM +0200, Michal Simek wrote:
> > Probably all of the "return ret ?: count;" uses
> > would be more easily understood on 3 lines.
>
> This structure is also quite common in the kernel
> git grep "? :" | wc -l
> 415
>
> git grep "?:" | wc -l
> 541
And it should a
Hi Joe,
On 10/02/2013 06:06 PM, Joe Perches wrote:
> On Wed, 2013-10-02 at 17:35 +0200, Michal Simek wrote:
>> This new fpga subsystem core should unify all fpga drivers/managers which
>> do the same things. Load configuration data to fpga or another programmable
>> logic through common interface.
On Wed, Oct 02, 2013 at 05:35:58PM +0200, Michal Simek wrote:
> +What:/sys/class/fpga_manager/fpga/fpga_config_state
> +Date:October 2013
> +KernelVersion: 3.12
> +Contact: Michal Simek
> +Description:
> + By reading this file you will get cur
On Wed, 2013-10-02 at 17:35 +0200, Michal Simek wrote:
> This new fpga subsystem core should unify all fpga drivers/managers which
> do the same things. Load configuration data to fpga or another programmable
> logic through common interface. It doesn't matter if it is MMIO device,
> gpio bitbangin
This new fpga subsystem core should unify all fpga drivers/managers which
do the same things. Load configuration data to fpga or another programmable
logic through common interface. It doesn't matter if it is MMIO device,
gpio bitbanging, etc. connection. The point is to have the same
interface for
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