On Tue, Mar 16, 2021 at 9:24 PM Rob Herring wrote:
>
> On Sun, Mar 7, 2021 at 8:18 PM Anup Patel wrote:
> >
> > On Sat, Mar 6, 2021 at 4:52 AM Rob Herring wrote:
> > >
> > > On Sun, Feb 21, 2021 at 03:07:57PM +0530, Anup Patel wrote:
> > > > The RISC-V CPU idle states will be described in DT und
On Sun, Mar 7, 2021 at 8:18 PM Anup Patel wrote:
>
> On Sat, Mar 6, 2021 at 4:52 AM Rob Herring wrote:
> >
> > On Sun, Feb 21, 2021 at 03:07:57PM +0530, Anup Patel wrote:
> > > The RISC-V CPU idle states will be described in DT under the
> > > /cpus/riscv-idle-states DT node. This patch adds the
On Sat, Mar 6, 2021 at 4:52 AM Rob Herring wrote:
>
> On Sun, Feb 21, 2021 at 03:07:57PM +0530, Anup Patel wrote:
> > The RISC-V CPU idle states will be described in DT under the
> > /cpus/riscv-idle-states DT node. This patch adds the bindings
> > documentation for riscv-idle-states DT nodes and
On Sun, Feb 21, 2021 at 03:07:57PM +0530, Anup Patel wrote:
> The RISC-V CPU idle states will be described in DT under the
> /cpus/riscv-idle-states DT node. This patch adds the bindings
> documentation for riscv-idle-states DT nodes and idle state DT
> nodes under it.
>
> Signed-off-by: Anup Pate
The RISC-V CPU idle states will be described in DT under the
/cpus/riscv-idle-states DT node. This patch adds the bindings
documentation for riscv-idle-states DT nodes and idle state DT
nodes under it.
Signed-off-by: Anup Patel
---
.../bindings/riscv/idle-states.yaml | 250
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