Marc Zyngier writes:
On Tue, 28 Jan 2025 22:08:27 +,
Colton Lewis wrote:
>> + bitmap_set(cpu_pmu->cntr_mask, 0, pmcr_n);
>> +
>> + if (reserved_guest_counters > 0 && reserved_guest_counters <
pmcr_n) {
>> + cpu_pmu->hpmn = reserved_guest_counters;
>> +
On Tue, 28 Jan 2025 22:08:27 +,
Colton Lewis wrote:
>
> >> + bitmap_set(cpu_pmu->cntr_mask, 0, pmcr_n);
> >> +
> >> + if (reserved_guest_counters > 0 && reserved_guest_counters < pmcr_n) {
> >> + cpu_pmu->hpmn = reserved_guest_counters;
> >> + cpu_pmu->partitioned = true;
Colton Lewis writes:
Hey Marc, thanks for looking.
*for the review
Marc Zyngier writes:
On Mon, 27 Jan 2025 22:20:27 +,
Colton Lewis wrote:
/* Read the nb of CNTx counters supported from PMNC */
- bitmap_set(cpu_pmu->cntr_mask,
- 0, FIELD_GET(ARM
Hey Rob, thanks for the review.
Rob Herring writes:
On Mon, Jan 27, 2025 at 4:26 PM Colton Lewis
wrote:
@@ -1215,10 +1243,19 @@ static void __armv8pmu_probe_pmu(void *info)
cpu_pmu->pmuver = pmuver;
probe->present = true;
+ pmcr_n = FIELD_GET(ARMV8_PMU_PMCR_N, arm
Hey Marc, thanks for looking.
Marc Zyngier writes:
On Mon, 27 Jan 2025 22:20:27 +,
Colton Lewis wrote:
For PMUv3, the register MDCR_EL2.HPMN partitiones the PMU counters
into two ranges where counters 0..HPMN-1 are accessible by EL1 and, if
allowed, EL0 while counters HPMN..N are only
On Mon, Jan 27, 2025 at 4:26 PM Colton Lewis wrote:
>
> For PMUv3, the register MDCR_EL2.HPMN partitiones the PMU counters
> into two ranges where counters 0..HPMN-1 are accessible by EL1 and, if
> allowed, EL0 while counters HPMN..N are only accessible by EL2.
>
> Introduce a module parameter in
On Mon, 27 Jan 2025 22:20:27 +,
Colton Lewis wrote:
>
> For PMUv3, the register MDCR_EL2.HPMN partitiones the PMU counters
> into two ranges where counters 0..HPMN-1 are accessible by EL1 and, if
> allowed, EL0 while counters HPMN..N are only accessible by EL2.
>
> Introduce a module paramet
For PMUv3, the register MDCR_EL2.HPMN partitiones the PMU counters
into two ranges where counters 0..HPMN-1 are accessible by EL1 and, if
allowed, EL0 while counters HPMN..N are only accessible by EL2.
Introduce a module parameter in the PMUv3 driver to set this
register. The name reserved_guest_c
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