26.12.2020, 20:52, "Andy Shevchenko" :
> On Thu, Dec 24, 2020 at 1:23 PM Nikita Shubin
> wrote:
>> Since gpiolib requires having separate irqchips for each gpiochip, we
>> need to add some we definetly need a separate one for F port, and we
>
> definitely
>
>> could combine gpiochip A and B in
On Thu, Dec 24, 2020 at 1:23 PM Nikita Shubin wrote:
>
> Since gpiolib requires having separate irqchips for each gpiochip, we
> need to add some we definetly need a separate one for F port, and we
definitely
> could combine gpiochip A and B into one - but this will break namespace
> and logick.
Since gpiolib requires having separate irqchips for each gpiochip, we
need to add some we definetly need a separate one for F port, and we
could combine gpiochip A and B into one - but this will break namespace
and logick.
So despite 3 irqchips is a bit beefy we need a separate irqchip for each
in
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