Hi,
Alright, so I spent some time looking at the SPI framework and :
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
> +static int dra7xxx_qspi_start_transfer_one(struct spi_master *master,
> + struct spi_message *m)
> +{
> + struct dra7xxx_qspi *qspi = spi_master_g
On Tue, Jul 02, 2013 at 06:19:47PM +0300, Felipe Balbi wrote:
> On Tue, Jul 02, 2013 at 12:04:32PM +0100, Mark Brown wrote:
> > One thing I really want to get round to doing with the SPI core is
> > providing an easy to pick up GPIO chip select as standard
> that should be fairly simple I guess.
On Tue, Jul 02, 2013 at 12:04:32PM +0100, Mark Brown wrote:
> On Tue, Jul 02, 2013 at 01:43:38PM +0300, Felipe Balbi wrote:
> > On Tue, Jul 02, 2013 at 11:17:18AM +0100, Mark Brown wrote:
>
> > > + /* setup command reg */
> > > + qspi->cmd = 0;
> > > + qspi->cmd |= QSPI_WLEN(8);
>
> > Sourav hard
On Tue, Jul 02, 2013 at 01:43:38PM +0300, Felipe Balbi wrote:
> On Tue, Jul 02, 2013 at 11:17:18AM +0100, Mark Brown wrote:
> > + /* setup command reg */
> > + qspi->cmd = 0;
> > + qspi->cmd |= QSPI_WLEN(8);
> Sourav hardcodes wordlenght to 8-bits, and yet he enables 8, 16 and
> 32-bits per
Hi Sekhar,
On Tuesday 02 July 2013 04:27 PM, Sekhar Nori wrote:
On 7/2/2013 2:26 PM, Sourav Poddar wrote:
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped i
On 7/2/2013 2:26 PM, Sourav Poddar wrote:
> The patch add basic support for the quad spi controller.
>
> QSPI is a kind of spi module that allows single,
> dual and quad read access to external spi devices. The module
> has a memory mapped interface which provide direct interface
> for accessing d
On Tue, Jul 02, 2013 at 11:17:18AM +0100, Mark Brown wrote:
> On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
> > On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
>
> > > Does this hardware really support anything other than 8 bits per word?
> > > There is no code in the d
On Tuesday 02 July 2013 04:01 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:53:49PM +0530, Sourav Poddar wrote:
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device *
Hi,
On Tue, Jul 02, 2013 at 03:53:49PM +0530, Sourav Poddar wrote:
> On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
> >Hi,
> >
> >On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
> +static int dra7xxx_qspi_setup(struct spi_device *spi)
> +{
> + struct dra7xxx_qspi
Hi Mark,
On Tuesday 02 July 2013 03:47 PM, Mark Brown wrote:
On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
Does this hardware really support anything other than 8 bits per word?
There is no code in the driver which pays
On Tuesday 02 July 2013 03:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
+static int dra7xxx_qspi_setup(struct spi_device *spi)
+{
+ struct dra7xxx_qspi *qspi =
+ spi_master_get_devdata(spi->master);
+
+ int c
On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
> On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
> > Does this hardware really support anything other than 8 bits per word?
> > There is no code in the driver which pays any attention to the word
> > size...
> the HW has a
Hi,
On Tue, Jul 02, 2013 at 03:30:42PM +0530, Sourav Poddar wrote:
> >>+static int dra7xxx_qspi_setup(struct spi_device *spi)
> >>+{
> >>+ struct dra7xxx_qspi *qspi =
> >>+ spi_master_get_devdata(spi->master);
> >>+
> >>+ int clk_div;
> >>+
> >>+ if (!qspi->spi_max_freq
Hi Felipe,
On Tuesday 02 July 2013 02:54 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 33f9c09..ea14eff 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -46,6 +46,7 @@ obj-
Hi,
On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
> On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
>
> > 1. Placed pm specific calls in prepare/unprepare apis.
> > 2. Put a mask to support upto 32 bits word length.
>
> Does this hardware really support anything othe
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
> 1. Placed pm specific calls in prepare/unprepare apis.
> 2. Put a mask to support upto 32 bits word length.
Does this hardware really support anything other than 8 bits per word?
There is no code in the driver which pays any attenti
Hi,
On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 33f9c09..ea14eff 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_OCTEON)+= spi-octeon.o
> obj-$(C
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
for accessing data form external spi devices.
The patch will configu
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