Re: [PATCH v7 3/5] mtd: Add support for HyperBus memory devices

2019-06-25 Thread Vignesh Raghavendra
On 26/06/19 6:46 AM, masonccy...@mxic.com.tw wrote: > Hi Vignesh, > >> >> Subject >> >> [PATCH v7 3/5] mtd: Add support for HyperBus memory devices >> >> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate >> Bus interfa

Re: [PATCH v7 3/5] mtd: Add support for HyperBus memory devices

2019-06-25 Thread masonccyang
Hi Vignesh, > > Subject > > [PATCH v7 3/5] mtd: Add support for HyperBus memory devices > > Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate > Bus interface between a host system master and one or more slave > interfaces. HyperBus is u

Re: [PATCH v7 3/5] mtd: Add support for HyperBus memory devices

2019-06-24 Thread Vignesh Raghavendra
On 22/06/19 1:22 AM, Sergei Shtylyov wrote: > Hello! > > On 06/20/2019 08:22 PM, Vignesh Raghavendra wrote: > >> Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate >> Bus interface between a host system master and one or more slave >> interfaces. HyperBus is used to conne

Re: [PATCH v7 3/5] mtd: Add support for HyperBus memory devices

2019-06-21 Thread Sergei Shtylyov
Hello! On 06/20/2019 08:22 PM, Vignesh Raghavendra wrote: > Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate > Bus interface between a host system master and one or more slave > interfaces. HyperBus is used to connect microprocessor, microcontroller, > or ASIC devices with

[PATCH v7 3/5] mtd: Add support for HyperBus memory devices

2019-06-20 Thread Vignesh Raghavendra
Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate Bus interface between a host system master and one or more slave interfaces. HyperBus is used to connect microprocessor, microcontroller, or ASIC devices with random access NOR flash memory (called HyperFlash) or self refresh