Hi,
On Mon, 26 Feb 2018 12:06:37 +0100
Hans Verkuil wrote:
> Hi all,
>
> On 01/30/2018 03:48 AM, Yong wrote:
> > Hi,
> >
> > On Mon, 29 Jan 2018 13:49:14 -0800
> > Randy Dunlap wrote:
> >
> >> On 01/29/2018 01:21 AM, Yong Deng wrote:
> >>> Allwinner V3s SoC features two CSI module. CSI0 is u
Hi all,
On 01/30/2018 03:48 AM, Yong wrote:
> Hi,
>
> On Mon, 29 Jan 2018 13:49:14 -0800
> Randy Dunlap wrote:
>
>> On 01/29/2018 01:21 AM, Yong Deng wrote:
>>> Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
>>> interface and CSI1 is used for parallel interface. This is
Hi,
On Mon, 29 Jan 2018 13:49:14 -0800
Randy Dunlap wrote:
> On 01/29/2018 01:21 AM, Yong Deng wrote:
> > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
> > interface and CSI1 is used for parallel interface. This is not
> > documented in datasheet but by test and guess.
>
On Mon, Jan 29, 2018 at 10:49 PM, Randy Dunlap wrote:
> On 01/29/2018 01:21 AM, Yong Deng wrote:
>> Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
>> interface and CSI1 is used for parallel interface. This is not
>> documented in datasheet but by test and guess.
>>
>> This
On 01/29/2018 01:21 AM, Yong Deng wrote:
> Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
> interface and CSI1 is used for parallel interface. This is not
> documented in datasheet but by test and guess.
>
> This patch implement a v4l2 framework driver for it.
>
> Currentl
Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
interface and CSI1 is used for parallel interface. This is not
documented in datasheet but by test and guess.
This patch implement a v4l2 framework driver for it.
Currently, the driver only support the parallel interface. MIPI
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