Re: [PATCH v6 5/6] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

Hello Stephen, I will fix in version 7 based on all comments. Thanks, Bintian On 2015/5/20 9:39, Stephen Boyd wrote: On 05/16, Bintian Wang wrote: @@ -94,18 +106,23 @@ struct clk *hisi_register_clkgate_sep(struct device *, const char *, const char *, unsigned

Re: [PATCH v6 5/6] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

On 05/16, Bintian Wang wrote: > @@ -94,18 +106,23 @@ struct clk *hisi_register_clkgate_sep(struct device *, > const char *, > const char *, unsigned long, > void __iomem *, u8, > u8, spinlock_t *); > +struct

Re: [PATCH v6 5/6] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

Hello Mike, Stephen, I updated this patch based on Stephen's suggestion, could you spend several minutes to help review? If there is no problem, please help to ack. Thanks, Bintian On 2015/5/16 15:40, Bintian Wang wrote: Add clock drivers for hi6220 SoC, this driver controls the SoC register

[PATCH v6 5/6] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC

Add clock drivers for hi6220 SoC, this driver controls the SoC registers to supply different clocks to different IPs in the SoC. We add one divider clock for hi6220 because the divider in hi6220 also has a mask bit but it doesnot obey the rule defined by flag "CLK_DIVIDER_HIWORD_MASK", we can not