Re: [PATCH v6 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

On Mon, 28 Dec 2020 15:05:10 +0100 Nadeem Athani wrote: > +static void cdns_pcie_retrain(struct cdns_pcie *pcie) Shouldn't this propagate a return value ? > +{ > + u32 lnk_cap_sls, pcie_cap_off = CDNS_PCIE_RP_CAP_OFFSET; > + u16 lnk_stat, lnk_ctl; > + > + /* > + * Set retrain b

[PATCH v6 2/2] PCI: cadence: Retrain Link to work around Gen2 training defect.

Cadence controller will not initiate autonomous speed change if strapped as Gen2. The Retrain Link bit is set as quirk to enable this speed change. Signed-off-by: Nadeem Athani --- drivers/pci/controller/cadence/pci-j721e.c | 3 ++ drivers/pci/controller/cadence/pcie-cadence-host.c | 32