On Sat, 26 Aug 2017 00:09:49 +0200
Andrea Adami wrote:
> On Fri, Aug 25, 2017 at 11:48 PM, Boris Brezillon
> wrote:
> > On Fri, 25 Aug 2017 19:50:25 +0200
> > Andrea Adami wrote:
> >
> >> On Fri, Aug 25, 2017 at 6:53 AM, Brian Norris
> >> wrote:
> >> > On Thu, Aug 24, 2017 at 01:27:10PM +0
On Fri, 25 Aug 2017 00:11:29 +0200
Boris Brezillon wrote:
> > +/*
> > + * The logical block number assigned to a physical block is stored in the
> > OOB
> > + * of the first page, in 3 16-bit copies with the following layout:
> > + *
> > + * 01234567 89abcdef
> > + *
> > + * E
On Fri, Aug 25, 2017 at 11:48 PM, Boris Brezillon
wrote:
> On Fri, 25 Aug 2017 19:50:25 +0200
> Andrea Adami wrote:
>
>> On Fri, Aug 25, 2017 at 6:53 AM, Brian Norris
>> wrote:
>> > On Thu, Aug 24, 2017 at 01:27:10PM +0200, Boris Brezillon wrote:
>> >> On Thu, 24 Aug 2017 12:30:02 +0200
>> >> An
On Fri, 25 Aug 2017 19:50:25 +0200
Andrea Adami wrote:
> On Fri, Aug 25, 2017 at 6:53 AM, Brian Norris
> wrote:
> > On Thu, Aug 24, 2017 at 01:27:10PM +0200, Boris Brezillon wrote:
> >> On Thu, 24 Aug 2017 12:30:02 +0200
> >> Andrea Adami wrote:
> >>
> >> > On Thu, Aug 24, 2017 at 12:04 PM,
On Fri, Aug 25, 2017 at 6:53 AM, Brian Norris
wrote:
> On Thu, Aug 24, 2017 at 01:27:10PM +0200, Boris Brezillon wrote:
>> On Thu, 24 Aug 2017 12:30:02 +0200
>> Andrea Adami wrote:
>>
>> > On Thu, Aug 24, 2017 at 12:04 PM, Boris Brezillon
>> > wrote:
>> > > On Thu, 24 Aug 2017 11:19:56 +0200
>>
On Thu, Aug 24, 2017 at 01:27:10PM +0200, Boris Brezillon wrote:
> On Thu, 24 Aug 2017 12:30:02 +0200
> Andrea Adami wrote:
>
> > On Thu, Aug 24, 2017 at 12:04 PM, Boris Brezillon
> > wrote:
> > > On Thu, 24 Aug 2017 11:19:56 +0200
> > > Andrea Adami wrote:
...
> > >> >> + /* create physi
On Tue, 22 Aug 2017 11:42:52 +0200
Andrea Adami wrote:
> The Sharp SL Series (Zaurus) PXA handhelds have 16/64/128M of NAND flash
> and share the same layout of the first 7M partition, managed by Sharp FTL.
>
> The purpose of this self-contained patch is to add a common parser and
> remove the h
On Thu, 24 Aug 2017 12:30:02 +0200
Andrea Adami wrote:
> On Thu, Aug 24, 2017 at 12:04 PM, Boris Brezillon
> wrote:
> > On Thu, 24 Aug 2017 11:19:56 +0200
> > Andrea Adami wrote:
> >
> >> >> +/**
> >> >> + * struct sharpsl_ftl - Sharp FTL Logical Table
> >> >> + * @logmax: number of
On Thu, Aug 24, 2017 at 12:04 PM, Boris Brezillon
wrote:
> On Thu, 24 Aug 2017 11:19:56 +0200
> Andrea Adami wrote:
>
>> >> +/**
>> >> + * struct sharpsl_ftl - Sharp FTL Logical Table
>> >> + * @logmax: number of logical blocks
>> >> + * @log2phy: the logical-to-physical table
>>
On Thu, 24 Aug 2017 11:19:56 +0200
Andrea Adami wrote:
> >> +/**
> >> + * struct sharpsl_ftl - Sharp FTL Logical Table
> >> + * @logmax: number of logical blocks
> >> + * @log2phy: the logical-to-physical table
> >> + *
> >> + * Stripped down from 2.4 sources for read-only purpos
Boris,
thanks for the review.
I have made the required changes apart th elast one: error values to
be returned..
Please see my comments.
On Tue, Aug 22, 2017 at 2:54 PM, Boris Brezillon
wrote:
> Hi Andrea,
>
> Le Tue, 22 Aug 2017 11:42:52 +0200,
> Andrea Adami a écrit :
>
>> The Sharp SL Series
Hi Andrea,
Le Tue, 22 Aug 2017 11:42:52 +0200,
Andrea Adami a écrit :
> The Sharp SL Series (Zaurus) PXA handhelds have 16/64/128M of NAND flash
> and share the same layout of the first 7M partition, managed by Sharp FTL.
>
> The purpose of this self-contained patch is to add a common parser an
The Sharp SL Series (Zaurus) PXA handhelds have 16/64/128M of NAND flash
and share the same layout of the first 7M partition, managed by Sharp FTL.
The purpose of this self-contained patch is to add a common parser and
remove the hardcoded sizes in the board files (these devices are not yet
conver
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